Product-service system innovation capabilities: linkages between the fuzzy front end and subsequent development phases

In an attempt to remain competitive, manufacturers increasingly offer integrated product-service systems (PSSs). This transition from physical products to PSSs calls for new ways of working, for example in the product development process. However, so far only limited attention has been put on capabilities needed to succeed with PSS innovation in the very early development phases – often referred to as the fuzzy front end (FFE). This article, therefore, has a dual aim: first, to further our understanding of capabilities for PSS innovation in the FFE, and second, to determine how these capabilities are linked to PSS innovation capabilities needed in subsequent development phases. Empirical data were collected from an ongoing industrial project developing an innovative PSS offering in a large manufacturing company. Individuals connected to the project reported major challenges, both experienced in the FFE and anticipated in later phases, which provided valuable information regarding capabilities needed to succeed with the endeavour. Findings reveal four links of PSS innovation capabilities: (1) adapting vocabulary and mental models to PSS, (2) handling the ‘intangible aspect’, (3) bridging organisational structures, and (4) managing new business models. PSS innovation capabilities in the FFE are also found to be of higher order (dynamic) compared to capabilities in later development phases.     

35 km amplifier-less four-level pulse amplitude modulation signals enabled by a 23 GHz ultrabroadband directly modulated laser

The 4-level pulse amplitude modulation(PAM4)based on an 23 GHz ultrabroadband directly modulated laser(DML)was proposed.We have experimentally demonstrated that based on intensity modulation and direct detection(IMDD)56 Gbps per wavelength PAM4 signals transferred over 35 km standard single mode fiber(SSMF)without any optical amplification and we have achieved the bit error rate(BER)of the PAM4 transmission was under 2.9×10–4 by using feed forward equalization(FFE).     

加肋载车板的设计应用

在载车板设计中,在钢板下面焊接加肋,并通过有限元软件分析车轮踏面位置变化时,载车板强度、刚度的变化,指导设计过程、检验设计成果。分析结果表明,加肋载车板能保证强度,大幅提高刚度,降低重量,加肋载车板具有较大的推广价值。     

基于系数可调FFE的10 Gb/s发送端的设计

采用SMIC 40 nm CMOS工艺,设计了一种工作在10 Gb/s的SerDes高速串行接口发送端电路,并创新性地提出了一种系数可调的FFE结构,使电路能适用于不同衰减的信道。电路主要模块为复接器、3阶FFE均衡器。复接器采用经典半速率结构,使用数字模块搭建,降低了功耗,并通过设计使采样时钟位于输入的最佳采样点,抑制了毛刺的产生。FFE均衡器采用结构简单的TSPC类型D触发器、低功耗的选择器和系数可调节抽头加法电路,使信号达到均衡效果,补偿信道的衰减。仿真结果显示,电路稳定工作于10 Gb/s,在1.1 V电源电压下功耗仅为30 mW。     

A 6.25 Gb/s equalizer in 0.18μm CMOS technology for high-speed SerDes

This paper presents a 0.18μm CMOS 6.25 Gb/s equalizer for high speed backplane communication. The proposed equalizer is a combined one consisting of a one-tap feed-forward equalizer （FFE） and a two-tap half-rate decision feedback equalizer （DFE） in order to cancel both pre-cursor and post-cursor ISI. By employing an active-inductive peaking circuit for the delay line, the bandwidth of the FFE is increased and the area cost is minimized. CML-based circuits such as DFFs, summers and multiplexes all help to improve the speed of DFEs. Measurement results illustrate that the equalizer operates well when equalizing 6.25 Gb/s data is passed over a 30-inch channel with a loss of 22 dB and consumes 55.8 mW with the supply voltage of 1.8 V. The overall chip area including pads is 0.3 × 0.5 mm^2.     

SYSTEMATIC METHOD TO GENERATE NEW IDEAS IN FUZZY FRONT END USING TRIZ

The obstacle for idea generation in fuzzy front end （FFE） is difficult to apply knowledge in different fields for designers. Theory of inventive problem solving TRIZ and computer-aided innovation systems （CAIs） which are TRIZ-base software systems with a knowledge base provide a framework for knowledge application in different fields. The major methods in TRIZ are selected, which have four types. The problems to be solved for each method are summarized and mapping from the problems to the methods is given. Systematic method with eight paths to integrate the methods and problems is formed. A case study shows the idea generation in FFE using the integrated method step by step.     

一个用于高速SerDes的基于0.18um CMOS工艺的6.25Gb/s均衡器

本文介绍了一种基于0.18mm CMOS工艺,适用于高速背板传输的6.25Gb/s均衡器。该均衡器由1抽头前馈均衡器(FFE)和2抽头判决反馈均衡器(DFE)组成,能够消除前向码间干扰和后向码间干扰。FFE中的延迟线采用了有源电感峰化技术,不仅增加了带宽,也节省了面积。基于CML的加法器,触发器和选择器的使用则提高了DFE的速度。测试结果表明,对于经过衰减达22dB的30英寸信道的6.25Gb/s数据,该均衡器能够很好地进行均衡。1.8V的电源电压下的功耗为55.8mW,包括焊盘在内的整个芯片面积为0.3*0.5 mm₂。     

一种应用于RFID数据传输的自适应均衡方法

在射频识别( Radio Frequency IDentification,RFID)系统中,传输信号在高速远距离传输过程中,受传输环境和突发状况等影响,导致传输信号产生畸变和衰减,解调后的基带信号会产生码间干扰,影响了信号传输质量,并且限制了传输的速度。文中提出了一种适用于RFID系统基带数据传输的自适应FFE-DFE均衡的方法。该方法实现复杂度低,不需要很复杂的电路设计,算法计算速度快。实验结果表明,自适应FFE-DFE均衡方法有效改善了均衡效果,减小了误码率,消除了信号中的码间干扰和噪声,数据传输距离大大延长。     

游程编码压缩技术在水电机组状态监测系统中的应用

随着我国水电事业的发展,水电在整个电网中的比重越来越大,另外,水轮发电机组单机容量也在逐步增大,一旦事故停机会造成严重的经济损失,从而对机组可用率、机组运行的效率、安全性、可靠性与经济性提出了更高的要求.状态监测系统可以监测机组状态及预估其发展趋势,因此,安装状态监测系统是必然要求.然而,在机组长期监测的过程中会产生大量的历史数据,庞大的数据量给存储和查询以及网络传输都带来很多问题,因此必须采用合理的压缩算法对原始采样数据进行压缩处理.本文详细介绍了一种FFT变换与游程编码相结合的压缩算法,并用实例进行了演示.     

金属低周疲劳过程热力学熵特征分析及寿命预测模型

选取Q235钢试样开展低周疲劳试验,通过改变加载幅值、加载频率等条件,研究分析了低周疲劳过程热力学熵产率与累积熵产变化特征。结果表明,熵产率随加载幅值的增大而升高且在同一载荷下熵产率近似恒定。低周疲劳过程中热力学熵的累积是一个准线性累加过程。试样最终疲劳断裂熵随加载幅值的增大而减小,与加载频率无明显关系。在此基础上建立了基于热力学熵的金属低周疲劳寿命预测模型,该模型可用于金属构件疲劳损伤的实时评估。