Focused ion beam contact to non-volatile memory cells

Electrical characterization of non-volatile memory cells has been performed. A focused ion beam (FIB) contact procedure is presented that allows to contact the floating gate.Calculations and measurement results on an exemplary floating gate memory cell show intact cell structure with limited retention time after FIB modification. The presented procedure allows the measurement and control of the previously unavailable floating gate current and voltage.     

A low power high speed MTJ based non-volatile SRAM cell for energy harvesting based IoT applications

Powering billions of devices is one of the most challenging barrier in achieving the future vision of IoT. Most of the sensor nodes for IoT based systems depend on battery as their power source and therefore fail to meet the design goals of lifetime power supply, cost, reliable sensing and transmission. Energy harvesting has the potential to supplant batteries and thus prevents frequent battery replacement. However, energy autonomous systems suffer from sudden power variations due to change in external natural sources and results in loss of data. The memory system is a main component which can improve or decrease performance dramatically. The latest versions of many computing system use chip multiprocessor (CMP) with on-chip cache memory organized as array of SRAM cell. In this paper, we outline the challenges involved with the efficient power supply causing power outage in energy autonomous/self-powered systems. Also, various techniques both at circuit level and system level are discussed which ensures reliable operation of IoT device during power failure. We review the emerging non-volatile memories and explore the possibility of integrating STT-MTJ as prospective candidate for low power solution to energy harvesting based IoT applications. An ultra-low power hybrid NV-SRAM cell is designed by integrating MTJ in the conventional 6T SRAM cell. The proposed LP8T2MTJ NV-SRAM cell is then analyzed using multiple key performance parameters including read/write energies, backup/restore energies, access times and noise margins. The proposed LP8T2MTJ cell is compared to conventional 6T SRAM counterpart indicating similar read and write performance. Also, comparison with the existing MTJ based NV-SRAM cells show 51–78% reduction in backup energy and 42–70% reduction in restore energy.     

Back-end-of-line compatible Conductive Bridging RAM based on Cu and SiO2

Conductive Bridging RAM (CBRAM) is a promising candidate for future non-volatile memories. This technology is based on the change of the cell’s resistive state, due to formation and dissolution of a metallic filament through an insulating layer. In this work we study Cu/SiO₂ cells fabricated using standard back-end-of-line (BEOL) processes, making them low-cost and easy to integrate. We show evidence of reproducible electrical switching, without the need of an annealing post-treatment. Furthermore, the kinetic behaviour of the switching mechanism was studied using electrical experiments.     

System-level impacts of persistent main memory using a search engine

Computer memory systems traditionally use distinct technologies for different hierarchy levels, typically volatile, high speed, high cost/byte solid state memory for caches and main memory (SRAM and DRAM), and non-volatile, low speed, low cost/byte technologies (magnetic disks and flash) for secondary storage. Currently, non-volatile memory (NVM) technologies are emerging and may substantially change the landscape of memory systems. In this work we assess system-level latency and energy impacts of a computer with persistent main memory using PCRAM and Memristor, comparing the development and execution of a search engine application implementing both a traditional file-based approach and a memory persistence approach (Mnemosyne). Our observations show that using memory persistence on top of NVM main memory, instead of a file-based approach on top DRAM/Disk, produces less than half lines of code, is more than 4× faster to develop, consumes 33× less memory energy, and executes search tasks up to 33× faster.     

Controlled growth of a graphene charge-floating gate for organic non-volatile memory transistors

We report memory application for graphene as a floating gate in organic thin-film transistor (OTFT) structure. For graphene floating gate, we demonstrate a simpler synthesis method to form a discrete graphene layer by controlling the growth time during a conventional CVD process. The resulting organic memory transistor with the discrete graphene charge-storage layer is evaluated. The device was demonstrated based on solution-processed tunneling dielectric layers and evaporated pentacene organic semiconductor. The resulting devices exhibited programmable memory characteristics, including threshold voltage shifts (∼28 V) in the programmed/erased states when an appropriate gate voltage was applied. They also showed an estimated long data retention ability and program/erase cycles endurance more than 100 times with reliable non-volatile memory properties although operated without encapsulation and in an ambient condition.     

Nano-Floating Gate Memory Devices Composed of ZnO Thin-Film Transistors on Flexible Plastics

Nano-floating gate memory devices were fabricated on a flexible plastic substrate by a low-temperature fabrication process. The memory characteristics of ZnO-based thin-film transistors with Al nanoparticles embedded in the gate oxides were investigated in this study. Their electron mobility was found to be 0.18 cm²/V·s and their on/off ratio was in the range of 10⁴–10⁵. The threshold voltages of the programmed and erased states were negligibly changed up to 10³ cycles. The flexibility, memory properties, and low-temperature fabrication of the nano-floating gate memory devices described herein suggest that they have potential applications for future flexible integrated electronics.     

烤烟非挥发有机酸、高级脂肪酸与其他成分及其感官品质的关系

研究了176份烤烟样品中的非挥发有机酸、高级脂肪酸含量与其常规化学成分、钙、中性致香成分和吸食品质的关系.结果表明:非挥发有机酸、高级脂肪酸均与烤烟主要化学指标及香气成分相关关系密切,尤其是丙二酸与总氮,苹果酸与钙、乳酸与巨豆三烯酮,棕榈酸与烟碱、香叶基丙酮、二氢大马酮、巨豆三烯酮,油酸+亚油酸与香叶基丙酮相关系数较高,其关系散点图拟合趋势线为直线、一元二次、三次或乘幂曲线.丙二酸、草酸、酸碱比、苹果酸/柠檬酸比、钙/苹果酸比主要影响烤烟的感官质量,其中,丙二酸、酸碱比对感官质量的影响较大;棕榈酸、油酸+亚油酸对烤烟香型风格和感官质量均有显著影响.质量较好烤烟的棕榈酸、油酸+亚油酸、酸碱比、苹果酸/柠檬酸比相对较高,丙二酸、草酸、钙/苹果酸较低,浓香型烤烟的棕榈酸、亚油酸+油酸含量较低.     

Evaluation of layered tunnel barrier charge trapping devices for embedded non-volatile memories

This paper presents experimental results on band gap engineered charge trapping devices for embedded non-volatile memories. Different material systems with high-k dielectrics and metal gates were fabricated using 193 nm lithography and the electrical evaluation was performed on 256 bits mini-arrays. The structure relies essentially on a layered tunnel ONO (oxide-nitride-oxide) barrier that replaces the tunnel oxide in conventional SONOS devices. In addition, we have implemented high-k dielectrics, metal gates and sealing layer in order to achieve low programming voltage and improve the data retention especially at elevated temperature. Whereas, high-k and metal gate systems allow low programme/erase voltages attractive for embedded non-volatile memories, the conventional band gap engineered SONOS (BE-SONOS) offers better high-temperature data retention. However, compared to a SONOS device with a standard “thick” tunnel oxide of 6 nm close to the EOT of the layered tunnel ONO barrier, it appears that BE-SONOS memories suffer from charge loss toward the channel and therefore we believe that the band gap engineered feature of the ONO barrier requires alternative materials.     

Polymer-based non-volatile resistive random-access memory device fabrication with multi-level switching and negative differential resistance state

Resistive random-access memory (RRAM) has been widely considered for its prospective applicability owing to its non-volatile characteristics. In this study, a polymer-based vacuum-free RRAM device fabricated with the conductive polymer, poly(3,4-ethylene-dioxythiophene)-poly(styrenesulfonate) (PEDOT:PSS) was proposed. Pristine PEDOT:PSS coated on indium tin oxide (ITO) electrode was used as the active layer, while PEDOT:PSS with 16 vol% ethylene glycol was added for the top electrode. The PEDOT:PSS-based RRAM device demonstrated controlled non-volatile bipolar switching and a good ON/OFF ratio with a negative differential resistance effect in the high-voltage range during the RESET process. Multi-level switching was also accomplished by controlling the voltage, which demonstrated reliable and non-volatile switching. The switching mechanism of this polymer RRAM device can be explained through the electrochemical filamentary formation as well as the current-induced phase segregation of PEDOT:PSS near the anode(ITO)/polymer interface.     

Low temperature Ni-nanocrystals-assisted hybrid polycrystalline silicon thin film transistor for non-volatile memory applications

The nickel-nanocrystals (Ni-NCs)-embedded silicon nitride acting as a trapping layer has been successfully demonstrated to manipulate the charging and discharging of electrons in a thin film transistor (TFT) for non-volatile memory (NVM) applications. Regarding device performance, with and without Ni-NCs in the stack and under a programming/erasing condition of +/−18 V for 1 s, a better threshold voltage shift of 3.2 V can be reached compared to a shift of 2.0 V for a stack without Ni-NCs. The shift is an index representing the value required to differentiate “0” or “1” states during operation. In this case, the diameter range and number density of Ni-NCs are 5-13 nm and 5.3 × 10¹¹ cm⁻², respectively.