Transport properties of Mn-doped Ru2Si3

Transport properties of Mn-doped ruthenium silicide Ru₂Si₃ were studied both experimentally and theoretically. The precipitation-free Ru₂Si₃ single crystals were grown by the zone melting technique with radiation heating. The temperature dependence of the electrical resistivity and Hall coefficients of the crystals were measured. The electrical resistivity of 1% Mn-doped Ru₂Si₃ was lower than that of undoped crystals. The carrier concentration in the doped samples is about 10¹⁸ cm⁻³ at room temperature. Mn-doped Ru₂Si₃ has a twice higher carrier mobility compared to the undoped one. Theoretical calculation of the charge carrier mobility is based on the effective masses which are estimated from the ab initio electronic band structure and classical scattering mechanisms.     

The properties of aluminum, platinum silicide and copper based contacts for silicon high-power devices

Electrical, thermo-electrical and thermo-mechanical properties were compared for PtSi, aluminum (Al, PtSi-Al, PtSi-AlCuSi, PtSi-TiW-AlCuSi), and copper based contacts (TiW-Ni-Cu, TiW-Ni-Cu-Ni-Au, PtSi-TiW-Ni-Cu, PtSi-TiW-Ni-Cu-Ni-Au). High-power 2.5 kV/150 A P-i-N diode with both lapped and etched anode surface was used to characterize the performance of the contacts in the conditions of free floating silicon in pressed package. The devices with PtSi contacts have the lowest forward voltage drop, but do not survive the operation in pressed package under thermal cycling. The copper based contacts with PtSi layer give lower voltage drop and better thermo-mechanical ruggedness compared to that of aluminum. These features are conserved even with passivation against corrosion using Ni-Au. The contacts without the PtSi layer have high voltage drop and fail under thermal cycling. The composition of the contact layer is shown to influence the thermal behavior of device voltage drop. The crossing point current is found to decrease with increasing contact layer thickness. The lowest magnitude gives the aluminum contact.     

Spin coater based on brushless dc motor of hard disk drivers

We have developed a novel programmable, low cost, spin coater to be used for applications where flat substrates are coated with an uniform thin layer of a desirable material. The equipment is built with dc brushless motor present in most of the hard disk drivers (HDDs). The system offers manual control, wide speed range (from 0 to 10,000 rpm), spin speed stability and compact size. The paper also describes the use of such equipment for the fabrication of thin poly(o-methoxyaniline) (POMA) films, which are of particular interest for design organic electronic devices, such as diodes, transistor, sensors and displays.     

Microstructure of Si Cones Prepared by Ar^＋—Sputtering Si／Mo Target

By Ar^ sputtering onto Si wafers which were surrounded by Mo plates.uniform cones over a large area on the Si surface were formed.Scanning electron microscopic study showed that the cones were formed on the entire surface of the Si wafer.The dimensions of the uniform cones were one micrometer in diameter and 5-6 micrometers high.They were further characterized by means of cross-sectional transmission electron microscopy,with the technique of micro-diffractions,It was found that the cone contained a pure Si regime and a Mo-rich regime.In the binary Mo-Si zone,we identified three distinct areas vertically:(1)domains of Mo-induced Si ordered structures,(2)a small volume of a new Mo3Si2 structural variant,intergrown with the Si ordered structure,and(3) a small amount of pure Mo nanoparticles covering the surface of the cones.The formation of the large and uniform cones may provide a new surface configuration for potential applications in surface science and technology.     

Directional solidification and microstructures of near-eutectic Cr–Cr3Si alloys

Near-eutectic Cr–Cr₃Si alloys were directionally solidified in a high-temperature optical floating zone furnace. At the eutectic composition, uniform and well-aligned lamellar structures were obtained over a fairly wide range of solidification conditions, but not at very low or very high growth rates where degenerate and cellular structures, respectively, were obtained. The lamellar spacing was found to increase with decreasing solidification rate, in agreement with the Jackson–Hunt theory. In addition, for a fixed growth rate, the lamellar spacing was found to increase with increasing rotation rate. The growth directions in the lamellar eutectic are found to be 1 0 0 for the Cr₃Si phase and 1 1 1 for the Cr solid-solution phase. Eutectic microstructures (rod or lamellar) could also be produced at off-eutectic compositions, but only for a limited range of growth conditions.     

Titanium silicide/germanide formation on submicron features for high mobility SiGe channel field effect transistors

The formation of self-aligned Ti(Si_(1−x)Ge_(x))₂ on submicron lines is described. The silicide/germanide is formed by reacting sputtered Ti with epitaxially grown Si_(1−x)Ge_(x) of composition and thickness relevant to high mobility Si_(1−x)Ge_(x) channel field effect transistors. Ti(Si_(1−x)Ge_(x))₂ formation on narrow lines was carried out on phosphorous doped material, because of the well known difficulties of forming silicide on heavily n-doped silicon. A companion set of boron doped blanket films was also processed. The results show that the process temperature required for the minimization of silicide/germanide sheet resistance is reduced as compared to silicide formation on Si alone. However, the silicide/germanide films agglomerate with increased high temperature processing more easily than pure silicide. The thermal stability is degraded more for films with higher Ge content and is a strong function of dopant type. Silicide/germanide formation on phosphorous doped Si_(1−x)Ge_(x) layers with x = 10% have a line width dependence similar to silicide formation. Formation on phosphorous doped Si_(1−x)Ge_(x) layers with x = 27% display an inverse line width dependence, with higher overall sheet resistance. Formation of silicide/germanide on blanket films of boron doped Si_(1−x)Ge_(x) with x = 27% behaved similar to the formation of silicide on silicon.     

Low-temperature processing of shallow junctions using epitaxial and polycrystalline CoSi2

Cobalt disilicide is grown epitaxially on (100) Si from a 15 nm Co/2 nm Ti bilayer by rapid thermal annealing (RTA) at 900°C. Polycrystalline CoSi₂ is grown on (100) Si using a 15 nm Co layer and the same annealing condition. Silicide/p⁺-Si/n-Si diodes are made using the silicide as dopant source:¹¹B⁺ ions are implanted at 3.5–7.5 kV and activated by RTA at 600–900°C. Shallow junctions with total junction depth (silicide plus p⁺ region) measured by high-resolution secondaryion mass spectroscopy of 100 nm are fabricated. Areal leakage current densities of 13 nA/cm² and 2 nA/cm² at a reverse bias of -5V are obtained for the epitaxial silicide and polycrystalline silicide junctions, respectively, after 700°C post-implant annealing.     

Thermal reliability of n-GaAs/Ti/Pt/Au Schottky contacts with thin Ti films for reduced gate resistance

The thermal stability of Ti/Pt/Au Schottky contacts on n-GaAs with Ti films 0–60 nm is investigated. The contacts with Ti films as small as 10 nm remain thermally stable with annealing up to 400°C. The changes induced by thermal treatment in the electrical characteristics of the contacts are correlated with the Rutherford backscattering and microscopic analysis of the annealed samples. It shows profuse interdiffusion and interfacial reaction with 300°C anneal for the GaAs/Pt/Au system. It has been found that introducing the Ti film between GaAs and Pt/Au, the interdiffusion of Pt and Au is also prevented. These results are useful for reducing the gate metallisation resistance of metal semiconductor field effect transistors.     

Co-deposition of cobalt disilicide on silicon–germanium thin films

The formation of CoSi₂ on strained epitaxial Si_0.8Ge_0.2/Si(100) films has been studied as a function of the deposition method and annealing temperature. Two types of deposition processes were used: a direct method, where 5 nm of pure Co metal were deposited at room temperature onto a strained 80 nm thick Si_0.8Ge_0.2 layer; and a co-deposition method, where 5 nm Co and 18.2 nm Si were simultaneously deposited in a 1:2 ratio onto a strained Si_0.8Ge_0.2 layer at 450°C. Samples were then annealed at temperatures ranging from 500 to 800°C. Extended X-ray absorbance fine structure spectroscopy (EXAFS) and X-ray diffraction (XRD) were used to characterize the structure of the resulting films. It was found that the samples prepared via the direct deposition method did not convert to CoSi₂ at any annealing temperature up to 800°C, while the co-deposited samples formed epitaxial CoSi₂ at even the lowest annealing temperature of 500°C. These results are discussed in terms of proposed reaction mechanisms of the different deposition methods, based on consideration of the Co–Si–Ge ternary phase diagram.     

等离子增强化学气相淀积硅化钛薄膜的特性

本文以四氯化钛（ＴｉＣｌ４）和硅烷（ＳｉＨ４）为源物质，采用等离子增强化学气相淀积（ＰＥＣＶＤ）工艺结合常规热退火制备了优良的ＴｉＳｉ２薄膜。研究了淀积和退火条件对薄膜性质的影响。用四探针检测了退火前后薄膜的薄层电阻，用俄歇电子能谱（ＡＥＳ）和Ｘ射线衍射分析了薄膜的化学组成和晶体结构。