Micro-scale twistable organic field effect transistors and complementary inverters fabricated by orthogonal photolithography on flexible polyimide substrate

We fabricated micro-scale organic field effect transistors (OFETs) and complementary inverters on a twistable polyimide (PI) substrate by applying orthogonal photolithography. By applying a highly fluorinated photoresist and development solvent, it becomes possible to create organic electronic devices with a micro-scale channel length without damaging the underlying polymer films. The 3 μm-channel twistable pentacene OFET devices and complementary inverters created using p-type pentacene and n-type copper hexadecafluorophthalocyanine exhibited stable electrical characteristics from flat to twist configurations (angle of up to ∼50°). The realization of twistable micro-scale OFETs and inverter devices on a PI substrate may enable the production of functioning organic devices in practical, flexible configurations.     

Dynamics of carrier injection in picene thin-film field-effect transistors with an ionic liquid sheet and ionic liquid gel

We fabricated picene thin-film field-effect transistors (FETs) with an ionic liquid gel and ionic liquid sheet as the gate electrolyte, and then used electron spin resonance (ESR) to investigate the carrier injection process in the organic electric double layer (EDL) FET. The ESR spectra strongly depended on the morphology of gate electrolytes. Three types of carrier injection processes in the EDL-FET were observed by examining the applied-bias time, organic-layer thickness, and gate-voltage dependencies of the electric-field-induced ESR spectrum: (1) interface injection due to electrostatic EDL formation, (2) bulk injection due to penetration of ions (electrochemical bulk doping), and (3) electrochemical reaction. These findings are significant for designing novel materials using the EDL-FET technique because three different carrier injection processes may lead to different physical properties, even in the same organic material.     

Low temperature fabrication of a ZnO nanoparticle thin-film transistor suitable for flexible electronics

A bottom-gate/top-drain/source contact ZnO nanoparticle thin-film transistor was fabricated using a low temperature annealing process (150 °C) suitable for flexible electronics. Additionally, a high-k resin filled with TiO₂ nanoparticles was used as gate dielectric. After fabrication, the transistors presented almost no hysteresis in the I–V curve, a threshold voltage (V_T) of 2.2 V, a field-effect mobility on the order of 0.1 cm²/V s and an I_ON/I_OFF ratio of about 10⁴. However, the transistor is sensitive to aging effects due to interactions with the ambient air, resulting in current level reduction caused by trapped oxygen at the nanoparticle surface, and an anti-clockwise hysteresis in the transfer curve. It was demonstrated, conjointly, the possible desorption of oxygen by voltage stress and UV light exposure.     

Effects of semiconductor/dielectric interfacial properties on the electrical performance of top-gate organic transistors

We investigated the effects of varying the properties of the interface between a semiconductor P3HT layer and a dielectric Cytop™ layer on the performances of the resulting transistor devices by comparing the mobilities of devices prepared with bottom gate/bottom contact or top gate/bottom contact architectures. The reduced channel roughness that arose from the thermal annealing step dramatically enhanced the field-effect mobility, yielding the highest mobility yet obtained for a top-gate transistor: 0.12 cm²/V s. High-performance OFETs may be fabricated by controlling the channel roughness and the properties of the interface between the semiconductor and the gate dielectric.     

深度饱和三极管等效电路模型分析

运用现代电子仿真实验平台和传统实际实验方法，尝试通过对共发射极放大器电路静态和动态工作参数的测量，分析深度饱和的三极管的动态等效模型。并运用三极管的动态等效模型分析，当放大器输入和输出耦合电容改变时，对输入与输出信号之间相位位移的影响，通过仿真平台和传统方法实验结果分析两者结果一致，从而进一步阐明深度饱和三极管的等效模型。     

集成双极晶体管基区表面电势的二维模型及其应用

基区表面电特性对双极器件影响很大,本文建立了集成双极npn晶体管基区表面电势的二维模型。文中还通过对采用SiO_2膜和Si_3N_4-SiO_2双层膜一次钝化的电容(MOS和MNOS)和栅控npn晶体管的表面电特性的研究,发现SiO_2-Si_3N_4一次钝化膜能有效地减小基区表面电势。     

变频调速应用技术（一）第一讲百年期待盼变频（上）

变频器进入实用阶段，比发明异步电动机晚了近百年。本文从分析其原因入手，讲述了影响实施变频调速的主要问题。进而介绍了变频同时还必须变压的原理，以及正弦脉宽调制的具体实施方法。     

零器模型在晶体管放大器分析中的应用

晶体管放大器常采用图解法和等效电路法进行分析．本文以ｎ－ｐ－ｎ型晶体管为例，介绍了零器模型（包括静态模型和动态模型）在晶体管放大器分析方面的应用，它与传统方法不同，简便易行。     

Fully-printed,all-polymer,bendable and highly transparent complementary logic circuits

In this contribution we show a simple approach for the development of all-polymer based complementary logic circuits fabricated by printing on plastic, at low temperature and in ambient conditions. This is achieved by patterning, with a bottom-up approach, solely synthetic carbon-based materials, thus incorporating earth-abundant elements and enabling in perspective the recycling – a critical aspect for low-cost, disposable electronics. Though very simple, the approach leads to logic stages with a delay down to 30 μs, the shortest reported to date for all-polymer circuits, where each single component has been printed. Moreover, our circuits combine bendability and high transparency, favoring the adoption in several innovative applications for portable and wearable large-area electronics.     

All solution-processed organic single-crystal transistors with high mobility and low-voltage operation

High-mobility organic single-crystal field-effect transistors of 3,11-didecyldinaphtho[2,3-d:2′,3′-d′]benzo[1,2-b:4,5-b′]-dithiophene (C₁₀-DNBDT) operating at low driving voltage are fabricated by an all-solution process. A field-effect mobility as high as 6.9 cm²/V s is achieved at a driving voltage below 5 V, a voltage as low as in battery-operated devices, for example. A low density of trap states is realized at the surface of the solution-processed organic single-crystal films, so that the typical subthreshold swing is less than 0.4 V/decade even on a reasonably thick amorphous polymer gate dielectrics with reliable insulation. The high carrier mobility and low interface trap density at the surface of the C₁₀-DNBDT crystals are both responsible for the development of the high-performance all-solution processed transistors.