A Neural Network Approach for Signal Detection in Digital Communications

In this paper, we propose a new approach for signal detection in wireless digital communications based on the neural network with transient chaos and time-varying gain (NNTCTG), and give a concrete model of the signal detector after appropriate transformations and mappings. It is well known that the problem of the maximum likelihood signal detection can be described as a complex optimization problem that has so many local optima that conventional Hopfield-type neural networks fail to solve. By refraining from the serious local optima problem of Hopfield-type neural networks, the NNTCTG makes use of the time-varying parameters of the recurrent neural network to control the evolving behavior of the network so that the network undergoes the transition from chaotic behavior to gradient convergence. It has richer and more flexible dynamics rather than conventional neural networks only with point attractors, so that it can be expected to have much ability to search for globally optimal or near-optimal solutions. After going through a transiently inverse-bifurcation process, the NNTCTG can approach the global optimum or the neighborhood of global optimum of our problem. Simulation experiments have been performed to show the effectiveness and validation of the proposed neural network based method for the signal detection in digital communications.     

子波变换理论及其在信号处理中的应用

子波分析的形成是傅里叶分析发展史上里程碑式的进展，子波分析优于傅里叶交换的地方在于它在时域和频域同时具有良好的局部化性质，从而可以把分析的重点聚焦到任意的细节，被人们誉为数学显微镜，成为近年来在工具和方法上的重大突破。本文将子波理论中的主要定理、结论、变换特性和一些重要概念加以综述，以促进子波理论的应用。本文的重点在于介绍多分辨率分析和子波分析及其实现、子波变换及其算法、子波和滤波器组等的重要内容，并介绍其在信号处理中的应用及研究动态。     

模拟信号的恢复及其误差研究

数模混合仿真中模拟信号的恢复及其误差对整个仿真过程具有重要影响。本文探讨了用零阶保持和一阶保持进行信号恢复的方法，比较了它们的误差及工作特点。特别指出了一阶保持中，由于存在积分器复原时间及数字机操作时间的影响而会带来附加的误差，因此一阶保持方法较难达到其理论的精度。     

18Ni（350）马氏体时效钢的磁滞特性

采用双时效处理工艺研究了热轧１８Ｎｉ（３５０）马氏体时效钢的磁滞特性。结果表明，８２０℃·　ｈＡＣ＋（５９－６１０）·。ｈＡＣ＋５１０℃·。ｈＡＣ和８２０℃·　ｈＡＣ＋（６９０－７１０℃）·３ｈＡＣ＋１５０℃·３ｈＡＣ处理具有较高的磁滞性能，在对大量数据进行二元线性回归的基础上得出了１８Ｎｉ（３５０）马氏体时效钢磁滞特性的分段关系式。     

Mixed Mode VLSI Implementation of a Neural Associative Memory

A mixed mode digital/analog special purpose VLSI hardware implementation of an associative memory with neural architecture is presented. The memory concept is based on a matrix architecture with binary storage elements holding the connection weights. To enhance the processing speed analog circuit techniques are applied to implement the algorithm for the association. To keep the memory density as high as possible two design strategies are considered. First, the number of transistors per storage element is kept to a minimum. In this paper a circuit technique that uses a single 6-transistor cell for weight storage and analog signal processing is proposed. Second, the device precision has been chosen to a moderate level to save area as much as possible. Since device mismatch limits the performance of analog circuits, the impact of device precision on the circuit performance is explicitly discussed. It is shown that the device precision limits the number of rows activated in parallel. Since the input vector as well as the output vector are considered to be sparsely coded it is concluded, that even for large matrices the proposed circuit technique is appropriate and ultra large scale integration with a large number of connection weights is feasible.     

用核磁共振测井确定渗透率的原理和方法分析

对常规测井和核磁共振测井的渗透率公式进行了比较 ,发现各渗透率公式存在相互联系。几种核磁共振测井渗透率公式的计算结果和实验室渗透率的对比表明核磁共振参数和渗透率有很好的相关性 ;改进的渗透率公式可以准确地求取岩心和地层的渗透率。     

三维连通网络陶瓷的电磁特性Ⅱ电磁参数的影响因素

通过对具有不同骨架L径、陶瓷浆料组分在不同温度下烧结的三维连通网络陶瓷的电导率和电磁参数的测量,研究了对这种网络结构材料电磁参量的影响因素.结果表明,当三维连通网络陶瓷的电导率为10-4＜σ＜101S/cm时,其电损耗及感应磁损耗较大.三维连通网络陶瓷在高温下有较大的介电损耗特性,使其成为耐高温电吸波材料的理想选择.     

A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAM

In this paper we propose a novel built-in self-test (BIST) design for embedded SRAM cores. Our contribution includes a compact and efficient BIST circuit with diagnosis support and an automatic diagnostic system. The diagnosis module of our BIST circuit can capture the error syndromes as well as fault locations for the purposes of repair and fault/failure analysis. In addition, our design provides programmability for custom March algorithms with lower hardware cost. The combination of the on-line programming mode and diagnostic system dramatically reduces the effort in design debugging and yield enhancement. We have designed and implemented test chips with our BIST design. Experimental results show that the area overhead of the proposed BIST design is only 2.4% for a 128 KB SRAM, and 0.65% for a 2 MB one.     

Windows下的数据采集和A/D转换

主要论述了使用Visual C 6.0在Windows下实现数据的实时采集和信号的图形显示，其中包括数据采集、A／D转换以及信号的实时显示等。使用面向对象的编程方法，构造了一个通用的A／D转换类，具有很好的可重用性。     

铁电存储场效应晶体管I-V特性的物理机制模拟

文章讨论的模型主要描述了铁电存储场效应晶体管（FEMFET）的I-V特性。从理论结果可反映出几何尺寸效应和材料参数对晶体管电特性的影响。传统的阈值电压的概念巳不再适用，由于铁电层反偏偶极子的开关作用，自发极化的增加对存储器的工作状态产生很小的影响。该模型可用于设计和工艺参数的优化，并由直观原型的方法得到了验证。