基于Lyapunov指数的弱周期信号检测

分析了基于M e ln ikov法和相轨迹观察法的弱周期信号检测方法,针对该方法存在的检测精度低等不足,提出了基于Lyapunov指数法的弱周期信号检测方法。首先使用基于模型Lyapunov指数计算方法设置阈值,然后利用具有噪声的数据进行相空间重构并利用改进方法计算Lyapunov指数,并依此判断大尺度周期状态。该方法的特点是阈值设置精度高,可以实现自动识别。仿真结果验证了理论分析的正确性和有效性。     

一种结合高分辨率TDC的快速全数字锁相环设计

针对时间数字转换器(Time-to-Digital Converter,TDC)的分辨率较低,全数字锁相环(All Digital Phase-Locked Loop,ADPLL)锁定参考信号的时间较长等问题,提出一种在高精度TDC基础上快速实现锁定的全数字锁相环.提出的时间数字转换器运用抽头延迟线法和双通道差分延迟线法提高量化精度,采用对称式层次型结构实现对负时间间隔的量化,设计的相调电路将量化的脉冲信号还原为时间长度信号,通过状态机对反馈信号的相位提前或延迟,实现对参考信号的快速锁定,在环路锁定后使用下降沿检测电路适时关闭鉴频鉴相器和时间数字转换器,降低整体电路的功耗.在Xilinx KC705开发平台上进行仿真与验证,并在Xpower软件上与传统的基于游标尺链型的全数字锁相环进行功耗对比分析.结果表明,此全数字锁相环的量化误差控制在0.2 ns之内,反馈信号可在3个参考信号时钟周期内快速锁定参考信号,整体电路功耗相比传统的基于游标尺链型的全数字锁相环降低约18.1%.本文提出的全数字锁相环具有实时性强、锁定速度快、量化精度高、功耗低等优势,更适用于高速、低功耗的现代数字通信系统.     

Analysis of bilinear oscillators under harmonic loading using nonlinear output frequency response functions

In this paper, the new concept of nonlinear output frequency response functions (NOFRFs) is extended to the harmonic input case, an input-independent relationship is found between the NOFRFs and the generalized frequency response functions (GFRFs). This relationship can greatly simplify the application of the NOFRFs. Then, beginning with the demonstration that a bilinear oscillator can be approximated using a polynomial-type nonlinear oscillator, the NOFRFs are used to analyse the energy transfer phenomenon of bilinear oscillators in the frequency domain. The analysis provides insight into how new frequency generation can occur using bilinear oscillators and how the sub-resonances occur for the bilinear oscillators, and reveals that it is the resonant frequencies of the NOFRFs that dominate the occurrence of this well-known nonlinear behaviour. The results are of significance for the design and fault diagnosis of mechanical systems and structures which can be described by a bilinear oscillator model.     

无谐振峰减振器在雷达晶体振荡器上的应用

分析了振动环境对某雷达晶体振荡器的影响,并以此为依据设计了一种轻质的无谐振峰钢丝绳减振器,并与橡胶减振器进行了对比。实验结果表明,在基本保证减振效果的前提下,钢丝绳减振器更适合低温环境使用,晶体振荡器相位噪声相对橡胶减振器高出9～18 dBc/Hz@100Hz,可以在宽温度范围内用于地面、机载、舰载、球载等条件下的晶振减振。     

A low power current-reuse LC-VCO with an adaptive body-biasing technique

This work presents a low-power low-phase noise current-reuse LC voltage controlled oscillator (VCO) with an adaptive body-biasing technique that enhances the reliability of the proposed circuit under process, voltage, and temperature (PVT) variations. Furthermore, the supply voltage and power consumption of the proposed VCO are reduced by the start-up oscillation condition that is provided by the adaptive body-biased circuit. This property is in fact very interesting from the power management perspective. The proposed VCO works at carrier frequency of 1.8 GHz and draws the power of only 306 µW from a 0.9 V supply. It achieves phase noise of −123.36 dBc/Hz at 1 MHz offset and provides a figure-of-merit (FoM) of −193.61 dBc/Hz. The post-layout simulation results of designed VCO in 0.18 µm standard CMOS technology confirm the effectiveness of the proposed circuit.     

基于TOEO的频率和真延时可调波形产生方法

针对多种微波光子技术在雷达中的综合运用,提出了一种基于可调谐光电振荡器（TOE0）的频率和真延时独立可调的一体化线性调频波形光产生方法．首先利用可调谐光电振荡器实现频率可调谐,然后通过马赫增一德尔调制器（MzM）对其产生的信号进行脉冲调制,最后经由偏振调制器（PolM）同时实现线性调频与真延时．理论分析和仿真实验证实了所提方法具有频率和真延时独立可调谐的能力．该方法对宽带相控阵雷达波形产生与波束形成具有重要意义．     

用于数字频率合成器的NCO实现与优化

文章分别介绍了基于查找表法和CORDIC（COordination Rotation DIgital Computer）法实现的数控振荡器的优点和缺点,并推导了CORDIC算法产生正余弦信号的实现过程。综合它们各自的优点,实现一种混合算法的数控振荡器,最后将其运用FPGA技术实现。Modelsim和quartusⅡ仿真和验证结果表明,此设计是可行的,并且易于FPGA实现。与仅仅基于查找表法实现的NCO相比,其结构更简单,精度高,耗费资源少,速度快。     

采用有源电感的小面积宽可调范围VCO

为了实现电感-电容压控振荡器(LC VCO)的全集成和小面积,同时使其振荡频率具有较宽的可调范围和较低的相位噪声,采用差分有源电感和Q值增强共源共栅电路结构,对LC VCO进行设计。采用差分有源电感代替螺旋电感,减小了芯片面积,并利用有源电感的可调性,增大了振荡频率的可调范围。采用Q值增强共源共栅电路结构,增加了LC VCO的输出功率和Q值,进而减小了相位噪声。基于TSMC 0.18 μm RF CMOS工艺,采用Cadence仿真工具对LC VCO进行仿真验证。结果表明,LC VCO振荡频率的可调范围高达129%,在偏离最大振荡频率1 MHz处,最低相位噪声为-121.4 dBc/Hz,直流功耗为11 mW,优值FOMT(考虑到调谐范围)为-193.6 dBc/Hz。     

一种利用Duffing-Vanderpol振子估计弱信号相位的方法

根据Duffing-Vanderpol振子大周期态时的最大Lyapunov指数与系统策动力的关系,提出了一种基于该振子检测微弱信号相位参量的方法.该方法利用系统策动力与待测信号初始相位有关的特性,得到待测信号的初始相位,并将相位检测过程中噪声对系统的影响作为影响因子加以考虑.理论分析及数值仿真结果表明,该方法工程实现简单,抗噪性能好.当待测信号信噪比为-30 dB时,均方误差仅为0.1,具有较高的估计精度.     

New canonic lossy inductor using a single CDBA and its application

A new lossy inductor (parallel R-L type) using single current differencing buffered amplifier (CDBA) is presented, which employs only two resistors and a grounded capacitor. The proposed lossy inductor is shown to be useful in realizing an oscillator circuit, which provides quadrature voltage outputs using only two CDBAs, three resistors and two grounded capacitors and offers independent control on condition of oscillation and frequency of oscillation up to a frequency of 61 MHz. Detailed non-ideal analysis including single-pole model for voltage and current gain has also been carried out. SPICE simulation results and experimental results based upon the CDBA constructed from commercially available IC AD844 have been included which confirm the practical workability of the proposed lossy inductor and quadrature oscillator circuit.