电子产品可靠性设计与成本控制

介绍了可靠性设计过程涉及的质量控制成本的解决方法，通过对最有可能影响可靠性的电路设计、元器件选用等方面的分析，介绍了在降低可靠性设计成本的基础下更好地解决可靠性问题的一些方法。     

砂基中泥浆盾构法隧道施工开挖面稳定性试验研究

 通过模型试验，对泥浆盾构施工中泥浆维持开挖面稳定的力学机理，开挖面前缘土体的应力变化规律，泥浆压力作用机理及泥皮形态进行了研究，提出了中粗砂地基中临界泥浆压力 公式。     

试论降低成本的设计技术

一个新产品的功能和成本水平基本上已在产品设计阶段就确定了。研究降低成本的设计技术就是为了给设计师提供一套行之有效的降低和优化成本的辅助设计工具。降低成本设计的技术内涵是与设计过程并行的成本估算、知识基系统的建立和质量及成本的综合优化。论述了各国对此项技术研究应用的状况、技术分析、发展特点和研究前沿的项目及内容 ,如对此技术研究应用的迫切性、对降低成本的最佳时机和产品的全成本概念等的探讨和认识 ;对成本扩展到产品寿命全周期、对目标成本控制法和成本优化设计等的研究和应用。     

后压浆技术在杨凌国际会展中心基桩工程中应用效果的分析

本文叙述了杨凌国际会展中心基桩静力载荷试验的试验过程 ;通过对三根灌注桩承载力的试验结果分析 ,认为后压浆技术对提高灌注桩单桩极限承载力有很大作用     

峡口水库沥青混凝土面板的施工与试验

以灌溉、防洪为主的峡口水库大坝，为沥青混凝土面板堆石坝，为研究低温抗裂性能，对沥青混凝土面板破损取样，进行了配比和多种力学性能试验，并与原面板设计指标进行了对比。由于面板经受住了－20℃以下的低温考验，其所用沥青指标、破损取样试验结果，特别是冻断低温指标，对确定水工沥青混凝土低温抗裂检验标准有重要参考价值。     

电视机监督检验电磁兼容结果分析和对策

本文讨论了电磁兼容对电视机的技术要求和相应对策。     

Design for Consecutive Testability of System-on-a-Chip with Built-In Self Testable Cores

This paper introduces a new concept of testability called consecutive testability and proposes a design-for-testability method for making a given SoC consecutively testable based on integer linear programming problem. For a consecutively testable SoC, testing can be performed as follows. Test patterns of a core are propagated to the core inputs from test pattern sources (implemented either off-chip or on-chip) consecutively at the speed of system clock. Similarly the test responses are propagated to test response sinks (implemented either off-chip or on-chip) from the core outputs consecutively at the speed of system clock. The propagation of test patterns and responses is achieved by using interconnects and consecutive transparency properties of surrounding cores. All interconnects can be tested in a similar fashion. Therefore, it is possible to test not only logic faults but also timing faults that require consecutive application of test patterns at the speed of system clock since the consecutively testable SoC can achieve consecutive application of any test sequence at the speed of system clock.     

CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing

As System on a Chip (SoC) testing faces new challenges, some new test architectures must be developed. This paper describes a Test Access Mechanism (TAM) named CAS-BUS that solves some of the new problems the test industry has to deal with. This TAM is scalable, flexible and dynamically reconfigurable. The CAS-BUS architecture is compatible with the IEEE P1500 standard proposal in its current state of development, and is controlled by Boundary Scan features.This basic CAS-BUS architecture has been extended with two independent variants. The first extension has been designed in order to manage SoC made up with both wrapped cores and non wrapped cores with Boundray Scan features. The second deals with a test pin expansion method in order to solve the I/O bandwidth problem. The proposed solution is based on a new compression/decompression mechanism which provides significant results in case of non correlated test patterns processing. This solution avoids TAM performance degradation.These test architectures are based on the CAS-BUS TAM and allow trade-offs to optimize both test time and area overhead. A tool-box environment is provided, in order to automatically generate the needed component to build the chosen SoC test architecture.     

招标工程量清单与工程造价控制

合理确定招标工程量清单是有效实施工程造价事前控制的重要环节。通过对一些工程的招标工程量清单暴露出来的问题进行分析 ,阐述了招标工程量清单的合理性对有效实施工程造价事前控制的重要作用 ;合理确定招标工程量清单 ,关键是要以工程的质量和造价控制目标为出发点 ,在遵循一般项目划分习惯的同时 ,密切结合工程实际以及合同条款的要求 ,进行具体分析     

气体加速泵排水采气工艺技术应用与展望

介绍气体加速泵的结构、工艺原理及现场试验情况.通过室内实验和研究,并在蜀南气矿S1、S2井进行了先导性试验,对其在有水气田的应用作出了适应性评价.