无损自适应分布式算术编码的研究及应用

目前分布式算术编码研究都是基于先验概率已知的有损压缩,为了实现概率自适应的无损压缩,研究了采用结束字符和概率自适应的编码方式来实现编码,提出了无损自适应分布式算术编码。实验结果表明,该算法拥有更好的压缩效果和更低的解码复杂度,并且在实际应用中,编解码可以同时进行。由于无损自适应分布式算术编码具有编码简单、压缩效果好的优点,故将它和比特面编码结合实现超光谱图像压缩,并将仿真结果与3D-SPECK算法比较,结果表明了该方法可以使信噪比提高0.13-0.37dB。     

全自主机器人足球系统的全局地图构建研究

研究和讨论了如何通过多机器人的协作,实现全局地图的构建．在单个机器人通过自身携带的多传感器进行局部地图构建的基础上,研究了前向单目视觉传感器的建模方法,在此观测模型的基础上,用极大似然融合算法对球的位置信息进行融合,而对于多机器人返回的对方机器人位置信息,使用基于密度的空间聚类算法（DBSCAN）进行信息融合,从而实现全局地图构建．实验结果表明,通过多机器人的协作,可以准确地构建出全局地图,弥补了单个机器人自身传感器的有限感知范围,本文研究的方法完全满足全自主机器人足球比赛中动态环境地图构建的需要．     

基于FPGA的神经振荡器设计及优化

为神经振荡器提出了一种高效的FPGA实现方案,介绍了一种改进的分布式算法(DA),以便于最大限度地利用FPGA上的查找表(LUT)资源.整个系统在Matlab/Simulink下采用Altera公司的DSP Builder构建.该方法节约了74％的查找表、75％的寄存器和100％的嵌入式乘法器资源.同时,该方案得到了令...     

Theories of initial segments of standard models of arithmetics and their complete extensions

We investigate families of finite initial segments of standard models for various arithmetics. We give an axiomatization of the theory of sentences true in almost all finite models with addition. We also characterize its complete extensions and relate its infinite models to models of Presburger arithmetic.We also estimate the complexity of complete extensions of the arithmetic with addition and multiplication.     

锅炉水温度和压力专家PID分段控制系统

原有锅炉温度和压力调节系统性能不能满足生产需求,结合专家控制和PID控制的优点,根据误差的变化范围提出了专家PID分段控制方案.从控制结果可以看出,该方法对水温及水压实现了有效的闭环恒值控制.     

基于像素链的直线绘制算法

针对直线生成算法在直线斜率大于0.5时的低效率问题,提出一种基于像素链的直线绘制算法。将直线看做是由许多条平行像素链或对角像素链拼接而成,提出并利用逆向生成直线的类Bresenham算法,将斜率在0.5~1的直线绘制转换为斜率在0~0.5的直线绘制,一次判断生成一条像素链。仿真实验表明,基于像素链的算法生成的直线与Bresenham算法生成直线一致,且计算量显著减少。该算法只有加法和乘法两种整数运算,适合硬件实现,其绘制速度是Bresenham算法的4倍。     

Online Text Prediction with Recurrent Neural Networks

Arithmetic coding is one of the most outstanding techniques for lossless data compression. It attains its good performance with the help of a probability model which indicates at each step the probability of occurrence of each possible input symbol given the current context. The better this model, the greater the compression ratio achieved. This work analyses the use of discrete-time recurrent neural networks and their capability for predicting the next symbol in a sequence in order to implement that model. The focus of this study is on online prediction, a task much harder than the classical offline grammatical inference with neural networks. The results obtained show that recurrent neural networks have no problem when the sequences come from the output of a finite-state machine, easily giving high compression ratios. When compressing real texts, however, the dynamics of the sequences seem to be too complex to be learned online correctly by the net.     

Functional Differentiation of Computer Programs

We present a purely functional implementation of the computational differentiation tools—the well known numeric (i.e., not symbolic) techniques which permit one to compute point-wise derivatives of functions defined by computer programs economically and exactly (with machine precision). We show how the use of lazy evaluation permits a transparent and elegant construction of the entire infinite tower of derivatives of higher order for any expressions present in the program. The formalism may be useful in various problems of scientific computing which often demand a hard and ungracious human preprocessing before writing the final code. Some concrete examples are given.     

Digit Pipelined Arithmetic for 3-D Massively Parallel Optoelectronic Circuits

A concept for a future integer arithmetic unit suitable for a realization with 3-D optoelectronic very large scale integrated (VLSI) circuits is presented. Due to the use of optical interconnections running vertically to the circuit's surface no pin limitation is given. This allows massively parallelism and a higher throughput performance than in all-electronic solutions. To exploit the potential of optical interconnections in VLSI systems efficiently well-adapted low-level algorithms and architectures have to be developed. This is demonstrated for a pipelined arithmetic unit using a redundant number representation. A transistor layout for the optoelectronic circuits is given as well as a specification for the necessary optical interconnection scheme linking the circuits with free-space optics. It is shown that the throughput can be increased by a factor of 10 to 50 compared to current all-electronic processors by considering state-of-the-art optical and optoelectronic technology. Furthermore we present results we gained by investigations on a first realized optoelectronic VLSI test chip.