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141.
唐德民 《自动化应用》2012,(9):42-43,52
从放大器电路、放大器芯片的S参数扫描、阻抗匹配特性,分析低噪声放大器的外围器件参数设计原理,采用ADS仿真软件实例研究基于MAX2640的低噪声放大器电路设计过程,提出综合考虑增益、噪声系数和阻抗匹配的方法。  相似文献   
142.
微波低噪声硅晶体管的方波电磁脉冲损伤研究   总被引:4,自引:3,他引:4  
杨洁  刘尚合  原青云  武占成 《高电压技术》2007,33(7):111-114,158
为了得到电磁脉冲注入对硅半导体器件的作用效应,对两个批次的同型号微波低噪声硅晶体管进行方波注入试验,得出了此类器件对电磁脉冲的最灵敏端对CB结和最敏感参数VBRCEO、损伤电压值、损伤电流值及损伤功率值。电磁脉冲注入时,通过示波器记录晶体管上的瞬时电压、电流波形并得出器件瞬时功率波形。将器件损伤时出现的二次击穿点的功率平均值作为该器件的损伤功率值,将二次击穿点的延迟时间与对应的损伤功率值作P-T图,得出其拟合曲线方程。根据拟合方程把各延迟时间下的损伤功率换算为1μs脉宽下的功率值,统计其损伤能量基本符合正态分布。经分析,器件方波电磁脉冲注入时的损伤机理为热二次击穿。  相似文献   
143.
A CMOS Low-Noise Instrumentation Amplifier Using Chopper Modulation   总被引:3,自引:0,他引:3  
This paper describes a low-power, low-noise chopper stabilized CMOS instrumentation amplifier for biomedical applications. Low thermal noise is achieved by employing MOSTs biased in the weak/moderate inversion region, whereas chopper stabilization is utilized to shift 1/f-noise out of the signal band hereby ensuring overall low noise performance. The resulting equivalent input referred noise is approximately 7 nV/ for a chopping frequency of 20 kHz. The amplifier operates from a modest supply voltage of 1.8 V, drawing 136 A of current thus consuming 245 W of power. The gain is 72.5 dB over a 4 kHz bandwidth. The inband PSRR is above 90 and the CMRR exceeds 105 dB.Jannik Hammel Nielsen was born in Nuuk, Greenland, in 1972. He received the M.Sc. and Ph.D. degrees in electrical engineering in 1999 and 2004 respectively, from the Technical University of Denmark. He is presently employed as a postdoctoral researcher at ØrstedDTU.His main research interests are in low-voltage, low-power analog systems, medical electronics and data converters.Erik Bruun received the M.Sc. and Ph.D. degrees in electrical engineering in 1974 and 1980, respectively, from the Technical University of Denmark. In 1980 he received the B.Com. degree from the Copenhagen Business School. In 2000 he also received the dr. techn. degree from the Technical University of Denmark.From January 1974 to September 1974 he was with Christian Rovsing A/S, working on the development of space electronics and test equipment for space electronics. From 1974 to 1980 he was with the Laboratory for Semiconductor Technology at the Technical University of Denmark, working in the fields of MNOS memory devices, I2L devices, bipolar analog circuits, and custom integrated circuits. From 1980 to 1984 he was with Christian Rovsing A/S. From 1984 to 1989 he was the managing director of Danmos Microsystems ApS. Since 1989 he has been a Professor of analog electronics at the Technical University of Denmark where he has served as head of the Sector of Information Technology, Electronics, and Mathematics from 1995 to 2001. Since 2001 he has been head of ØrstedDTU.His current research interests are in the areas of RF integrated circuit design and integrated circuits for mobile phones.  相似文献   
144.
本文基于双极晶体管的工艺,就如何对电流增益和特征频率两个参数进行优化研究.首先对其进行了器件工艺模拟分析优化,得到模拟特征频率在10 GHz,电流增益为160,而后进行了流片,通过测试得到特征频率为9.5 GHz,电流增益在160以上,最后进行了测试结果和模拟结果的比较分析.  相似文献   
145.
在谐振腔内放置双KTP使其快轴互呈45°角作为复合波片,使其同时具有倍频作用和λ/4波片(QWP)作用,与各相异性Nd∶YVO4共同作用有效抑制了腔内偏振模耦合,获得多纵模低噪声绿光输出。  相似文献   
146.
    
A modified common source-common gate (CS-CG) low-noise transconductance amplifier (LNTA) with an improved noise figure (NF), operational bandwidth, and power consumption are analyzed in this paper. The common source (CS) stage of the modified LNTA is utilized for noise cancellation and transconductance enhancement of the common gate (CG) transistor. Using these, NF, bandwidth, and power consumption are improved without using extra active elements. Noise analyses show the modified CS-CG LNTA has lower NF than conventional CS-CG LNTA. The linearity of the modified CS-CG LNTA is calculated by Taylor series expression. Besides, a design procedure is proposed based on the obtained equations for linearity and NF. Finally, an ultra-wideband (UWB) surface acoustic wave (SAW-less) direct-conversion receiver is designed in 65 nm complementary metal-oxide-semiconductor (CMOS) technology. NF and third-order intercept point (IIP3) of the designed receiver are simulated as 5 dB and −2 dBm, respectively. The receiver consumes 18.4 mA from a 1.8 V supply voltage.  相似文献   
147.
    
A V-band low-noise amplifier (LNA) employing a Gm-boosting technique is presented in this paper. With the transformers, which are applied between the adjacent stages, the transconductances of the following transistors are boosted. Thus, the gain of the circuit is effectively enhanced. The noise figure (NF) is also decreased with the technique. Utilizing a commercial 65-nm CMOS technology, the LNA is demonstrated. The measurement results show that the LNA achieves a maximum gain of 17.4 dB at 57.1 GHz with 10.9-GHz 3-dB gain bandwidth. The measured NF of the LNA is from 3.95 dB to 4.6 dB at 53 to 64 GHz. The tested input 1-dB gain compression point (IP1dB) is −14.2 dBm at 57 GHz. The DC power consumption is only 10 mW with 1-V power supply. The chip area is only 0.255 mm2 with all testing pads.  相似文献   
148.
基于TSMC 0.13μm CMOS工艺设计了一款应用于数字电视中的CMOS宽带高线性低噪声放大器。该电路采用传统宽带低噪声放大器的改进结构。为了提高LNA的线性度,采用伏尔特拉级数分析了电路的非线性分量,并修正了传统的噪声抵消电路用于抵消整个电路的非线性分量。基于TSMC 0.13μm CMOS工艺对其进行了设计,仿真结果表明:此LNA在50-860 MHz频带内,增益为12.7-13.3 dB,噪声系数最小仅为1.2 dB,在1.2 V的电源电压下,工作电流为12.2 mA,并且其输入三阶交调点为9.7~14.2 dBm,取得了较高的线性度。  相似文献   
149.
基于100 nm硅基氮化镓(GaN)工艺,本文设计并实现了一款工作频段为20~26 GHz且增益平坦的可变增益低噪声放大器(VGLNA).该放大器采用三级共源级级联来实现高增益,并通过调节第二、第三级的栅极偏置实现增益控制.测试结果表明,该放大器在工作频段内实现了超过20 dB的增益可变范围和±1.5 dB的增益平坦度,在增益可变范围内功耗为126 mW至413 mW.在最大增益状态下,该放大器在整个频段内可实现大于20 dB的小信号增益且噪声系数(NF)为2.95 dB至3.5 dB,平均输出1dB压缩点(OP1dB)约为14.5 dBm.该芯片的面积为2 mm~2.  相似文献   
150.
基于华虹0.18 μm SiGe BiCMOS工艺设计了一款低杂散、低相噪的电荷泵锁相环频率合成器芯片,其最高工作频率为400 MHz,射频输入频率范围为5~400 MHz,输入参考信号频率范围为20~300 MHz。本设计通过外接低通滤波器、压控振荡器,可实现完整的锁相环,如果把R/N分频都设置为“1”,芯片也可以单独当作电荷泵和鉴频鉴相器。芯片测试结果为:归一化相位噪声基底(噪声优值)为-228 dBc/Hz,电流源与电流沉失配小于2%,参考杂散为-107.6 dBc,带内噪声为-115 dBc/Hz@10 kHz。  相似文献   
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