A study of 3D Network-on-Chip design for data parallel H.264 coding

In this paper, we implement, analyze and compare different Network-on-Chip (NoC) architectures aiming at higher efficiencies for MPEG-4/H.264 coding. Two-dimensional (2D) and three-dimensional (3D) NoCs based on Non-Uniform Cache Access (NUCA) are analyzed. We present results using a full system simulator with realistic workloads. Experiments show the average network latencies in two 3D NoCs are reduced by 28% and 34% respectively, comparing with 2D design. It is also shown that heat dissipation is a trade-off in improving performance of 3D chips. Our analysis and experiment results provide a guideline to design efficient 3D NoCs for data parallel H.264 coding applications.     

Motion mapping and mode decision for MPEG-2 to H.264/AVC transcoding

This paper describes novel transcoding techniques aimed for low-complexity MPEG-2 to H.264/AVC transcoding. An important application for this type of conversion is efficient storage of broadcast video in consumer devices. The architecture for such a system is presented, which includes novel motion mapping and mode decision algorithms. For the motion mapping, two algorithms are presented. Both efficiently map incoming MPEG-2 motion vectors to outgoing H.264/AVC motion vectors regardless of the block sizes that the motion vectors correspond to. In addition, the algorithm maps motion vectors to different reference pictures, which is useful for picture type conversion and prediction from multiple reference pictures. We also propose an efficient rate-distortion optimised macroblock coding mode decision algorithm, which first evaluates candidate modes based on a simple cost function so that a reduced set of candidate modes is formed, then based on this reduced set, we evaluate the more complex Lagrangian cost calculation to determine the coding mode. Extensive simulation results show that our proposed transcoder incorporating the proposed algorithms achieves very good rate-distortion performance with low complexity. Compared with the cascaded decoder-encoder solution, the coding efficiency is maintained while the complexity is significantly reduced.

H.264宏块选择的自适应算法研究

在视频编码的过程中,运动估计占据了举足轻重的地位.其性能优劣会在一定程度上决定了码流质量.采用16×16宏块能够提高压缩比,但容易产生方块效应,使用4×4宏块可以提高图像质量,但降低了压缩比。H.264视频压缩标准采用多模式运动估计,可以有效减少块匹配预测误差,但随着模式的增多,算法计算量成倍增加.为了克服这个困难,本文提出一种新的自适应的宏块划分和运动估计算法。这种分块算法在综合考虑图像本身特性在编码过程中,根据图像的各个部分运动程度不同而采用不同的分快策略,兼顾图像质量和处理开销。     

AVS及H.264双模可变长解码器设计

为使视频解码芯片能同时兼容AVS及H.264这2种视频编码标准,设计一种双模可变长解码器。该设计复用码流缓冲移位和指数哥伦布解码模块,采用组合逻辑电路查找码表,对AVS和H.264码表进行优化与重组。在ModelSim环境下完成仿真测试,并通过FPGA芯片进行综合验证。结果表明,该设计能有效支持AVS和H.264 2种标准,减小电路资源消耗和面积,并提高查找表的查找效率。     

基于FPGA的H.264帧内预测实现和优化

在使用硬件电路进行H.264编码时,为提高帧内预测运算速度,减少硬件电路面积,提出一种基于现场可编程门阵列(FPGA)的H.264帧内预测硬件电路的实现和优化解决方案。利用FPGA的并行处理能力和同模式下帧内预测数据冗余对硬件电路进行优化。使用Verilog语言进行模块设计,仿真平台为Modelsim,在Altera CycloneII EP2C20F484C上的实现,验证了该硬件电路结构的高效性及实用性。     

基于H.264整数变换和量化的研究与软件优化

首先介绍基于二维离散余弦变换(DCT)的4×4块的整数变换和量化的基本原理;然后在测试模型提供的变换和量化算法上做了一定的优化;最后验证新的4×4块的整数变换和量化算法比测试模型的算法在运算时间上更快,效率更高,而PSNR值基本没有变化,达到了提高编码效率的目的。     

Research on Remote Video Monitoring System Used for Numerical Control Machine Tools Based on Embedded Technology

This paper designed an embedded video monitoring system using DSP (Digital Signal Processing ) and ARM (Ad- vanced RISC Machine).This system is an important part of self-service operation of numerical control machine tools,At first the analog input signals from the CCD(Charge Coupled Device) camera are transformed into digital signals,and then output to the DSP system,where the video sequence is encoded according to the new generation image compressing standard called H.264.The code will be transmitted to the ARM system through xBus,and then be packed in the ARM system and transmitted to the client port through the gateway.Web technology,embedded technology and image compressing as well as coding technology are integrated in the system,which can be widely used in self-service operation of numerical control machine tools and intelligent robot control areas.     

H.264编码工具性能及实时性研究

H．264具有更好的编码效率，但其高复杂度无法满足实时应用。针对低码率应用，分析各编码工具的性能并选取合理编码框架，同时利用单指令多数据（SIMD）技术并行实现快速搜索及整数变换。     

一种从H．264视频流中快速计算直方图的方法

为了快速提取视频流的直方图信息，提出了一种针对H．264视频流的快速直方图提取算法，并首先详细阐述了该算法的基本原理与实现过程。该算法是直接利用压缩视频流中的特征信息，采用基于统计的方法来快速计算出亮度直方图。相关实验结果表明，用该算法计算出的直方图与计算解压后的图像所得到的直方图非常接近，且效率上有很大的提高，可适用于镜头分割、视频检索等相关应用领域。     

DM642 DSP高效率视频编码优化方法

在视频监控系统和视频会议系统以及流媒体等应用中,数字视频编码成为最重要和最基本的技术手段,论文作者针对视频监控系统,论述了基于TMS320DM642媒体处理器DSP平台,实现H.264算法的优化方法。论文首先提出了该视频编码器在实时实现中的关键问题,然后对其不同部分提出了优化措施,最后给出实验结果。结果表明本编码器在保持较高图像质量和压缩效率的同时,编码速度能满足实时监控的要求。