基于Cache行为的旁路攻击

分析新型高速缓冲存储器(Cache)旁路攻击技术,给出一种Cache旁路攻击方法。针对S盒操作使用查找表处理的数据加密标准(DES)算法实现,通过获取DES加密过程中前2轮加密运算对应的Cache命中信息,结合数学分析方法,可以有效地缩小DES密钥搜索空间。对Cache存储器行为和数学分析攻击进行仿真实现的结果显示,通过26个选择明文,大约耗费230次离线DES加密时间成功地恢复了DES密钥。给出了防御Cache攻击的基本对策。     

低丢包率无线传感器网络S-MAC协议的研究

针对S-MAC协议的层间丢包问题,利用缓存队列原理提出了一种简化通信数据分组格式的S-MAC协议优化改进方案。结合TinyOS的主动消息机制在Mica2节点上实现了改进的S-MAC协议,并对MAC层的丢包率进行了测试。实验测试结果表明,优化改进后S-MAC协议较标准S-MAC协议在MAC层的丢包率上有明显的降低,提高了网络性能。     

Optimally designing caches to reduce P2P traffic

Traffic caused by P2P services dominates a large part of traffic on the Internet and imposes significant loads on the Internet, so reducing P2P traffic within networks is an important issue for ISPs. In particular, a huge amount of traffic is transferred within backbone networks; therefore reducing P2P traffic is important for transit ISPs to improve the efficiency of network resource usage and reduce network capital cost. To reduce P2P traffic, it is effective for ISPs to implement cache devices at some router ports and reduce the hop length of P2P flows by delivering the required content from caches. However, the design problem of cache locations and capacities has not been well investigated, although the effect of caches strongly depends on the cache locations and capacities. We propose an optimum design method of cache capacity and location for minimizing the total amount of P2P traffic based on dynamic programming, assuming that transit ISPs provide caches at transit links to access ISP networks. We apply the proposed design method to 31 actual ISP backbone networks and investigate the main factors determining cache efficiency. We also analyze the property of network structure in which deploying caches are effective in reducing P2P traffic for transit ISPs. We show that transit ISPs can reduce the P2P traffic within their networks by about 50-85% by optimally designing caches at the transit links to the lower networks.     

基于“嵩山”超级计算机系统的大规模管网仿真

供水管网仿真广泛应用于城市供水输配调度,是城市供水管网监测与维护的重要技术手段。由于在面向城市级的大规模管网中产生了海量的计算数据,因此在一般计算平台上无法满足管网仿真计算的算力需求。为提升城市级供水管网仿真的计算效率,提出一种有效的并行化方案。基于“嵩山”超级计算机系统采用中央处理器+数据缓存单元（CPU+DCU）架构,利用其在密集数据计算方面的优势,对“嵩山”超级计算机进行供水管网仿真。参照可移植性异构计算接口（HIP）异构编程模型,在“嵩山”超级计算机上实现供水管网仿真的异构计算,并结合管道数据分割方案,使用消息传递接口开启多进程以实现DCU加速数据通信传递。通过重定义数据类型解决计算过程中结构体传输问题,实现单节点内多DCU的大规模密集计算。在不同计算平台和多种计算策略仿真上的对比结果表明,与传统x86平台相比,该优化方案在小规模数据与大规模数据上的加速比分别达到5.269、10.760,与采用计算统一设备架构异构编程模型的传统GPU异构平台相比,计算性能有明显提高。     

Static Coarse Grain Task Scheduling with Cache Optimization Using OpenMP

Effective use of cache memory is getting more important with increasing gap between the processor speed and memory access speed. Also, use of multigrain parallelism is getting more important to improve effective performance beyond the limitation of loop iteration level parallelism. Considering these factors, this paper proposes a coarse grain task static scheduling scheme considering cache optimization. The proposed scheme schedules coarse grain tasks to threads so that shared data among coarse grain tasks can be passed via cache after task and data decomposition considering cache size at compile time. It is implemented on OSCAR Fortran multigrain parallelizing compiler and evaluated on Sun Ultra80 four-processor SMP workstation using Swim and Tomcatv from the SPEC fp 95. As the results, the proposed scheme gives us 4.56 times speedup for Swim and 2.37 times on 4 processors for Tomcatv respectively against the Sun Forte HPC Ver. 6 update 1 loop parallelizing compiler.     

AES访问驱动Cache计时攻击

首先给出了访问驱动Cache计时攻击的模型,提出了该模型下直接分析、排除分析两种通用的AES加密泄漏Cache信息分析方法;然后建立了AES加密Cache信息泄露模型,并在此基础上对排除分析攻击所需样本量进行了定量分析,给出了攻击中可能遇到问题的解决方案;最后结合OpenSSL v.0.9.8a,v.0.9.8j中两种...     

针对LBlock算法的踪迹驱动Cache攻击

LBlock是一种轻量级分组密码算法,其由于优秀的软硬件实现性能而备受关注。目前针对LBlock的安全性研究多侧重于抵御传统的数学攻击。缓存( Cache)攻击作为一种旁路攻击技术,已经被证实对密码算法的工程实现具有实际威胁,其中踪迹驱动Cache攻击分析所需样本少、分析效率高。为此,根据LBlock的算法结构及密钥输入特点,利用访问Cache过程中密码泄露的旁路信息,给出针对LBlock算法的踪迹驱动Cache攻击。分析结果表明,该攻击选择106个明文,经过约27.71次离线加密时间即可成功恢复LBlock的全部密钥。与LBlock侧信道立方攻击和具有Feistel结构的DES算法踪迹驱动Cache攻击相比,其攻击效果更明显。     

一种基于内容的Web服务器集群调度算法

基于内容的Web服务器集群调度算法具有很多优点.在分析已有方法基础上,提出一种部分复制的基于内容调度算法PRLARD(partially replicated locality-aware request distribution).理论分析和仿真结果表明,该算法具有良好的负载均衡能力和高的CACHE命中率.     

多核系统中共享Cache的冒泡替换算法

在多核环境下,对共享L2 Cache的优化显得尤为重要,因为当被访问的数据块不在L2 Cache中时(发生L2缺失),CPU需要花费几百个周期访问主存的代价是相当大的.在设计Cache时,替换算法是考虑的一个重要因素,替换算法的好坏直接影响Cache的性能和计算机的整体性能.虽然LRU替换算法已经被广泛应用在片上Cache中,但是也存在着一些不足:当Cache容量小于程序工作集时,容易产生冲突缺失;且LRU替换算法不考虑数据块被访问的频率.文中把冒泡替换算法应用到多核共享Cache中,同时考虑数据块被访问的频率和最近访问的信息.通过分析实验数据,与LRU替换算法相比,采用冒泡替换算法可以使MPKI(Misses per Kilo instructions)和L2 Cache命中率均有所改善.     

基于SDRAM缓存的实时视频图像几何校正系统

采用基于后向映射查找表结构的几何校正算法,结合双线性插值算法和SDRAM的时序特性,利用FPGA内部存储资源设计了一个特殊的Cache来缓存图像数据,等效实现了对SDRAM缓存图像四邻域像素的快速随机读取.该方法处理延时小、实时性强、成本低,可实现高分辨率视频图像的实时几何校正,对不同畸变视频图像校正,只需修改映射查找表.