Field‐Induced n‐Doping of Black Phosphorus for CMOS Compatible 2D Logic Electronics with High Electron Mobility

Black phosphorus (BP) has been considered as a promising two‐dimensional (2D) semiconductor beyond graphene owning to its tunable direct bandgap and high carrier mobility. However, the hole‐transport‐dominated characteristic limits the application of BP in versatile electronics. Here, we report a stable and complementary metal oxide semiconductor (COMS) compatible electron doping method for BP, which is realized with the strong field‐induced effect from the K⁺ center of the silicon nitride (Si_xN_y). An obvious change from pristine p‐type BP to n type is observed after the deposit of the Si_xN_y on the BP surface. This electron doping can be kept stable for over 1 month and capable of improving the electron mobility of BP towards as high as ~176 cm² V^–1 s^–1. Moreover, high‐performance in‐plane BP p‐n diode and further logic inverter were realized by utilizing the n‐doping approach. The BP p‐n diode exhibits a high rectifying ratio of ~10⁴. And, a successful transfer of the output voltage from “High” to “Low” with very few voltage loss at various working frequencies were also demonstrated with the constructed BP inverter. Our findings paves the way for the success of COMS compatible technique for BP‐based nanoelectronics.     

Emerging MXene-Based Memristors for In-Memory,Neuromorphic Computing,and Logic Operation

Confronted by the difficulties of the von Neumann bottleneck and memory wall, traditional computing systems are gradually inadequate for satisfying the demands of future data-intensive computing applications. Recently, memristors have emerged as promising candidates for advanced in-memory and neuromorphic computing, which pave one way for breaking through the dilemma of current computing architecture. Till now, varieties of functional materials have been developed for constructing high-performance memristors. Herein, the review focuses on the emerging 2D MXene materials-based memristors. First, the mainstream synthetic strategies and characterization methods of MXenes are introduced. Second, the different types of MXene-based memristive materials and their widely adopted switching mechanisms are overviewed. Third, the recent progress of MXene-based memristors for data storage, artificial synapses, neuromorphic computing, and logic circuits is comprehensively summarized. Finally, the challenges, development trends, and perspectives are discussed, aiming to provide guidelines for the preparation of novel MXene-based memristors and more engaging information technology applications.     

基于NCL路径平衡的抗功耗分析方法

由于对路径结构平衡的本质以及设计方法缺乏系统的研究,导致其在实际应用中严重依赖设计者自身的经验,难以推广到各类自动化综合方法中。对实现路径平衡结构的形式化定义及充分条件进行了研究,并给出了证明,进而提出了一种基于改进二元决策图(BDD, binary decision diagram)的零协议逻辑(NCL, null convention logic)异步电路路径平衡扩展方法。该方法能够简便地扩展至各类自动化综合过程中,并能在不改变目标电路特性的前提下,有效实现NCL异步电路的路径平衡结构,抵消由于寄生电容和负载电容差异所造成的密码芯片旁路信息泄露。     

一种模糊时态描述逻辑

针对现实生活中信息的时间性和模糊性,在模糊描述逻辑和时态逻辑的基础上,提出了一种模糊时态描述逻辑FTDL,并给出了其语法和语义的相关说明。与模糊描述逻辑FALC相比,FTDL的提出为语义Web服务的建模和推理提供了一种有效的途径。     

带自测功能的DDR2控制器设计

在研究了JEDEC制定的DDR2标准的基础上,基于对DDR2快速测试的目的,设计了一种带自测功能的新型DDR2控制器。该控制器既拥有常见的控制时序、刷新、初始化等功能,又可以在没有外部激励的情况下对DDR2进行测试。整个设计完全遵循JEDEC标准,采用自顶向下的设计方法,通过异步FIFO进行跨时钟域的信号通讯,接口部分兼容FPGA的MCB模块,可以实现和MCB的简单替代,最后用verilog语言进行描述并通过仿真验证和FPGA验证．达到了较高的性能和实现了要求的功能。与常见的控制器相比,本设计虽然增加了自测试功能,但综合后的面积只增加10％。     

模糊自整定PID控制器的设计与仿真

由于实际工业生产过程通常具有非线性,很难确定精确的数学模型,使用PID控制器无法达到满意的控制效果,因此提出计算机智能控制策略。利用计算机模拟人的控制过程,根据系统当前状态进行自动控制,达到控制精度要求。首先结合计算机仿真技~[JZiegler．Nichols方法进行PID参数整定,并利用模糊算法对参数进行在线自调整,在Matlab环境下完成全部设计。仿真结果证明,模糊自整定PID控制的算法使系统稳态性能变好,具有较强的鲁棒性,超调减小,控制效果明显优于传统PID控制。     

High-speed CMOS demultiplexer with redundant multi-valued logic

This paper describes an 11-Gb/s CMOS demultiplexer with redundant multi-valued logic. The proposed circuit receives serial binary data which is converted to parallel redundant multi-valued data. The converted data are reconverted to parallel binary data. By the redundant multi-valued data conversion, the redundant multi-valued logic makes it possible to achieve higher operating speeds than that of a conventional binary logic. The implemented demultiplexer consists of eight integrators. The circuit is designed with a 0.35?µm standard CMOS process. The validity and effectiveness are verified through HSPICE simulation. The demultiplexer is achieved to the maximum data rate of 11-Gb/s and the average power consumption of 69.43?mW. This circuit is expected to operate at a higher speed than 11-Gb/s in the deep-submicron process of the high operating frequency.     

Personalised routing for wheelchair navigation

Wheelchair users are confronted with many outdoor obstacles in everyday travel that can make the task arduous and unsafe, especially in unfamiliar environments. However, if wheelchair users are provided with routes that can safely, accurately and efficiently guide them to their destinations, then the difficulty and danger associated with traveling might be significantly reduced. In this article, we present a routing method suitable for wheelchair users by taking into account sidewalk obstacles such as slope, steps, sidewalk condition and sidewalk traffic as are preferred by users. Our method calculates impedance scores for each sidewalk segment, which are then used to determine an optimal route between any given pair of origin-destination addresses in a sidewalk network. We first discuss sidewalk network parameters and a spatial database suitable for wheelchair navigation. Then we discuss our personalised routing approach. We also describe three methods to weight the impedance level of each sidewalk segment and compare the effectiveness of each method through experimentation using the sidewalk network for the University of Pittsburgh campus area.     

超前进位加法器的一种优化设计

描述了超前进位加法器的一种优化设计.在结构上采用按4位分组进行超前进位的方法达到并行、高速的目的.为了在高速运算的同时降低功耗,对求和式子进行了逻辑变换;在晶体管级进行优化的单元电路设计,可减小延时、降低整个电路的面积和功耗.     

理想九点五态控制器原理的叙述

用计算的方式叙述理想九点五态控制器的控制原理。为便于人们理解二阶对象的运动中控制的变化过程,将抽象的对象转换为人们熟知的L-R-C电路,通过调节输入电压(即控制作用)的大小和方向来实现对对象性能的调节,并使系统达到理想的性能指标。最后用仿真来验证计算结果的正确性。