基于实际价迭代算法的涂料制造投入产出成本核算方法研究

针对化工涂料制造业生产工艺流程中的反消耗现象,试图将企业投入产出表和迭代算法相结合,提出了一个更为合理而有效的生产成本核算方法.该核算方法抓住但不拘泥于固有的工艺流程,通过构建迭代配方(BOM)和重组核算流程,实现投入产出表由实物量向价值量的转移,从而完成车间生产成本核算过程.     

利用CNC与PLC公共存储器设计数控分度台的方法

针对格里森609准双曲面齿轮精切机的数控改造,介绍了利用西门子802D数控系统CNC与PLC公共存储器设计其工件箱数控分度台的方法。     

新型精密磨削辅助微进给平台的研制及特性研究

设计了一种用于平面磨削主动控制的新型数控微进给工件平台.该平台由3个压电陶瓷(PZT)驱动器驱动,3个半圆形的弹性铰链构成的弹性环节实现对压电陶瓷驱动器的预紧.通过实验的方法研究了微进给平台的位移输出、静动态刚度等特性.     

A novel high-throughput method for table look-up based analog design automation

Analog circuit synthesis ofen requires repeated evaluations of circuit under design to reach the final design goals. Circuit simulations using SPICE can provide accurate assessment of circuit performance. Spice simulations are costly and incur significant overhead. A faster transistor-level evaluation is needed to provide higher throughput for synthesis applications. Further, miniaturization of FET’s has added physical effects into SPICE models, which complicated their equations with every generation. That complication has forced analog synthesis tool developers and circuit designers alike to perform circuit evaluations using SPICE.Analog circuit design tools largely failed in their declared goal, to take over circuit optimization tasks from human designers mainly due to over simplications using custom-developed equations for evaluating circuit performance. Since it is more and more difficult to accurately capture transistor behavior with each new generation of silicon technology, a more practical approach to analog design automation is to keep human engineers at the center of the design flow by providing them with as much needed decision-supporting data as quickly as possible. Mapping the trade-off landscape of a topology with respect to design specifications, for example, can save designers trial and error time. This approach to analog design automation requires less accuracy from the simulation sign-off tools, such as SPICE. However, it demands much faster response for circuit performance evaluations with sufficient accuracy.In this paper, a new solution to both calculation overheads and model complexity is proposed. The proposed fast evaluation method uses a novel look-up table (LUT) algorithm to extract circuit information from complex physics-based transistor models used by SPICE. The model makes use of contemporary memory space, by replacing equations with look-up tables in addition to advanced interpolation methods. The achieved improvement is over 100× throughput and complete decoupling from physical phenomena compared to SPICE run-time, in exchange for few gigabytes of data per device. Examples are shown for the effectiveness of replacing SPICE with our model in a transistor sizing flow, while keeping 99% of the samples inside the 5% error range on 180 nm and 40 nm CMOS processes. The proposed solution is not intended to replace sign-off quality tools, such as SPICE. Rather, it is intended to be used as a fast performance evaluator in analog design automation flows.     

Γ (Gamma): A SaaS-enabled fast and accurate analog design System

With ever increasing demand for lower power consumption, lower cost, and higher performance, designing analog circuits to meet design specifications has become an increasing challenging task, Analog circuit designers must, on one hand, have intimate knowledge about the underlining silicon process technology׳s capability to achieve the desired specifications. They must, on the other hand, understand the impact of tweaking circuits to satisfy a given specification on all circuit performance parameters. Analog designers have traditionally learned to tackle design problems with numerous circuit simulations using accurate circuit simulators such as SPICE, and have increasingly relied on trial-and-error approaches to reach a converging point. However, the increased complexity with each generation of silicon technology and high dimensionality of searching for solutions, even for some simple analog circuits, have made the trial-and-error approach extremely inefficient, causing long design cycles and often missed deadlines. Novel rapid and accurate circuit evaluation methods that are tightly integrated with circuit search and optimization methods are needed to aid design productivity.Furthermore, the current design environment with fully distributed licensing and supporting structures is cumbersome at best to allow efficient and up-to-date support for design engineers. With increasing support and licensing costs, fewer and fewer design centers can afford it. Cloud-based software as a service (SaaS) model provides new opportunities for CAD applications. It enables immediate software delivery and update to customers at very low cost. SaaS tools benefit from fast feedback and sharing channels between users and developers and run on hardware resources tailored and provided for them by the software vendor. On the downside, web-based tools are expected to perform in a very short turn-around schedule and be always responsive.This paper presents a list of innovations that come together to a new class of analog design tools: 1). Lookup table-based approach (LUT) to model complex transistor behavior provides both the necessary accuracy and speed essential for repeated circuit evaluations. 2). The proposed system architecture tight integrate the novel LUT approach with novel system level functions to allow further significantly better accuracy/speed tradeoff and faster design convergence with designer׳s intent. 3). Incorporating use inputs at key junctures of the design process allows the tool to better capture designer׳s intent and improve design convergence. 4). The combination of high accuracy and faster evaluation time make it possible to incorporate SaaS features, such as short solution space navigation steps and crowdsourcing, into the tool. This allows sharing of server-side resources between many users. Instead of fully automating a signoff circuit optimization process, the proposed tool provides effective aid to analog circuit designers with a dash-board control of many important circuit parameters with several orders faster in computation time than SPICE simulations.     

多位高精度素数表及其计算机的实现技术

论述素数产生的理论价值与应用意义。着重介绍了十进制多位素数表的计算机实现技术,以及笔者所在的“大数分解与素性检测支撑工具集成软件的研究”课题组就多位素数表和π(10~9)之值进行研究而获得的精确计算结果,并对现有的某些中外密码学、数论专著中关于π(10~9)的引用值提出了修正数据及其印证数据。     

仪器面板键盘结构设计的新方法及其应用

文中提出了一种新颖的仪器面板键盘结构设计原理和方法,它突破了传统的键盘结构模式,具有人机界面直观、操作简便、按键少、功能强,且监控程序结构清晰,易于编写和维护等特点。文章还以一种函数信号发生器的面板设计为例,阐述了该新的设计方法的应用,该设计方法对工程应用具有较大实用价值。     

片上多核网络存取控制器的设计与实现

提出一种基于片上网络消息传输的高效多核网络存取控制器。该网络存取控制器支持收发双工模式,内置一系列可配置寄存器,采用基于消息表的数据接收方式,通过记录并自动更新不同消息的接收配置信息使数据传输更加高效。使用SMIC 0.18 μm工艺进行综合,结果表明,其工作频率可达300 MHz,规模约为20 443门。     

VisualTPL: A visual dataflow language for report data transformation

Data transformation, an important part of report generation, converts the layout of source data into a new layout suitable for presentation. Many report tools have been developed for end-users to specify data transformation. However, current report tools only support a limited set of report layouts. This paper proposes a visual dataflow programming language, called VisualTPL, to resolve this problem. Data transformation is accomplished by writing graphical dataflow programs, which manipulate tables as first-class objects with a set of extendable table operations. A report tool, called VisualTPS, has been developed to offer an easy and intuitive end-user programming environment. Reports with sophisticated layouts can be created through top-down decomposition and incremental development. An evaluation has been conducted to assess end-users' performance with VisualTPL. The results indicated that end-users could learn VisualTPL in a short time and create complicated report layouts all by themselves. And, in comparison with a commercial report tool, VisualTPL offered end-users similar performances and was preferred over the commercial tool.     

Chord协议的改进双向路由表结构

在结构化P2P网络中有效快速地定位节点非常重要。Chord是结构化网络中一种比较成功的路由算法。但是Chord的路由表存在着一定的信息冗余,且只能从环的一个方向查询,对于后半环节点信息的查询支持不足,由此导致查询定位的效率不高。基于这种不足,本文提出了一种改进后的Chord路由表结构,将路由表中的冗余信息替换为反向环中部分节点信息,同时在路由表中增加剩余反向环的节点信息,由于利用了原表的冗余项,因此在不至于增加过多路由表项数的情况下实现了路由表的双向查找。仿真实验表明,改进后的路由表结构提高了查询效率。