一款应用于生物传感器的1.2V-600nW 12bit 2kS/s的增量型模数转换器

This paper presents an ultra-low power incremental ADC for biosensor interface circuits.The ADC consists of a resettable second-order delta–sigma(°/ modulator core and a resettable decimation filter.Several techniques are adopted to minimize its power consumption.A feedforward path is introduced to the modulator core to relax the signal swing and linearity requirement of the integrators.A correlated-double-sampling(CDS)technique is applied to reject the offset and 1/f noise,thereby removing the integrator leakage and relaxing the gain requirement of the OTA.A simple double-tailed inverter-based fully differential OTA using a thick-oxide CMOS is proposed to operate in the subthreshold region to fulfill both an ultra-low power and a large output swing at 1.2 V supply.The signal addition before the comparator in the feedforward architecture is performed in the current domain instead of the voltage domain to minimize the capacitive load to the integrators.The capacitors used in this design are of customized metal–oxide–metal(MOM) type to reach the minimum capacitance set by the k T =C noise limit.Fabricated with a 1P6 M 0.18 m CMOS technology,the presented incremental ADC consumes600 n W at 2 k S/s from a 1.2 V supply,and achieves 68.3 d B signal to noise and distortion ratio(SNDR) at the Nyquist frequency and an FOM of 0.14 p J/conversion step.The core area is 100120 m2.     

一款调制器和过采样率可配置的单芯片1.2V 95-55dB动态范围的Delta-Sigma模数转换器设计

A single die 1.2 V multi-stage noise shaping（Mash） 2-2 delta sigma analog to digital converter（ADC）for wide applications is implemented. The configurable Mash 2-2 modulator with a new decimation filter design is presented to achieve wide and high dynamic range（DR） for multiple practical applications. The novel modulator can be configured as a Mash 2-2 modulator for high precision or a 2-order modulator for low DR. The decimation filter is designed to select the OSR flexibly among cascaded integrator comb（CIC） filter and two half-band filters（HBF）. The serial peripheral interface（SPI） can be used to adjust the sampling frequency and the oversampling ratio（OSR）. The design was fabricated in a 0.13 m CMOS process with an area of 0.91 mm2and a total power of 5.2 mW. The measurement results show that the dynamic range（DR） of the proposed ADC can change from 55to 95 dB with the configurable OSR from 16 to 256. The spurious free dynamic range（SFDR） and signal-to-noise distortion ratio（SNDR） can get 99 dB and 86.5 dB, respectively.     

强激光驱动器能源系统瞬态特征实时测控系统研究

随着惯性约束核聚变研究的发展．强激光驱动器能源系统的研究备受关注。为了向激光驱动能源系统传输效率的研究提供可靠的实验数据．研究了强激光驱动器能源系统中氙灯瞬态放电特征数据进行实时检测的方法和测控系统结构。采用量化传输模式进行特征量的检测与传输，既实现了高压隔离，又避免了在远距离传输过程中受到干扰，确保测量精度。配合系统的模块化设计，采用多线程工作模式，对计算机系统的控制功能进行工作线程划分，提高了系统的实时性和协调性。实验表明，系统有效地实现了弱电系统对强电系统的远程控制．测量精度满足测量要求，已成功应用于能源系统的实验研究。     

基于FIF0与电平转换器的DSP高速ADC系统

给出了一种以DSP数字信号处理芯片TMS320VC5402作数据处理器，结合高速模数转换器AD9244、先进先出缓冲存储器芯片IDT7204以及电平转换器SN74ALVC164245构成的高速数据采集系统的设计方案。     

红外光谱法用于快速测定车用柴油酸度等性质的研究

针对车用柴油酸度等性质测定过程繁琐，采用衰减全反射样品池测定车用柴油的红外光谱，用偏最小二乘法（PLS）建立红外光谱测定车用柴油酸度、密度、闪点和凝点的4个校正模型，验证标准误差分别为0.46 mg/(100 mL),0.77kg/m3,2.60 ℃,2.77 ℃，该方法符合标准方法再现性要求。与标准方法相比，该方法具有无需预处理、操作简单、测量快速、重复性好等优点。     

CO2在辽河油田杜84块超稠油中的溶解性研究

采用闪蒸法测定了CO2在辽河油田杜84块超稠油中的溶解度,设计了两组实验。即模拟地层温度不变、压力从2MPa到22MPa和模拟地层压力不变、温度从50℃到230℃条件下CO2在馆陶组和兴隆台组原油中的溶解度,研究结果表明,CO2在杜84块超稠油中的溶解度很小。同时还研究了溶解CO2后原油粘度的变化特征。     

第三代红外焦平面探测器读出电路

对红外探测器不断增长和提高的需求催生了第三代红外焦平面探测器技术。根据第三代红外探测器的概念,像素达到百万级,热灵敏度NETD达到1 mK量级是第三代制冷型高性能红外焦平面探测器的基本特征。计算结果表明读出电路需要达到1000 Me－以上的电荷处理能力和100 dB左右的动态范围（Dynamic Range）才能满足上述第三代红外焦平面探测器需求。提出在像素内进行数字积分技术,以期突破传统模拟读出电路的电荷存储量和动态范围瓶颈限制,使高空间分辨率、高温度分辨率及高帧频的第三代高性能制冷型红外焦平面探测器得到实现。     

An 8-bit, 200 MSPS Folding and Interpolating ADC

An 8-bit, 200 MSPS folding and interpolating analog-to-digitalconverter, ADC, has been implemented in a 1.2 µmBiCMOS-process. It achieves 7.5 effective bits with a power dissipationof 575mW. The active area is 4mm². The implementationand measured results are presented. A simple analytical modelfor the interpolation-induced nonlinearity in a folding and interpolatingADC using sinusoidal folding is presented. The bowing of thereference ladder due to interaction with the input stages isanalyzed, and analytical models are derived.     

Au线键合中"塌线"问题的研究

目前,在半导体闪存多芯片的金线键合工艺中,为满足堆叠芯片不断增加等结构需要,键合线弧要求更低、更长,制造工艺变得相对更加复杂。针对生产过程中常遇到的塌线问题,通过对金线键合工艺中线弧形成动作的过程分析,以金线弹动现象为线索,探究了生产过程中塌线问题产生的原因,并给出了相应解决方案。经过此研究,长线键合的生产工艺能力得到加强,其成果对新封装产品的研发及基板设计具有有益的参考价值。     

一种适应于高性能嵌入式闪存的低压灵敏放大器

本文提出了一种适应于高性能嵌入式闪存的低压灵敏放大器,通过采用电流比较技术和自动消失调技术,该灵敏放大器在低电源电压下获得了很好的性能,改善了低电流阈值窗口存储器的读取速度。基于上海宏力半导体制造公司130nm的嵌入式闪存工艺,该灵敏放大器的感应时间在1.5V的电源电压下达到了0.43ns,其感应速度比传统的灵敏放大器提高了46%