Layout-Specific Circuit Evaluation in 3-D Integrated Circuits

In this paper, we describe a comprehensive layout methodology for bonded three-dimensional integrated circuits (3D ICs). In bonded 3D integration technology, parts of a circuit are fabricated on different wafers, and then, the wafers are bonded with a glue layer of Cu or polymer based adhesive. Using our layout methodology, designers can layout such 3D circuits with necessary information on inter-wafer via/contact and orientation of each wafer embedded in the layout. We have implemented the layout methodology in 3DMagic. Availability of 3DMagic has led to interesting research with a wide range of layout-specific circuit evaluation, from performance comparison of 2D and 3D circuits to layout-specific reliability analyses in 3D circuits. Using 3DMagic, researchers have designed and simulated an 8-bit encryption processor mapped into 2D and 3D FPGA layouts. Moreover, the layout methodology is an essential element of our ongoing research for the framework of a novel Reliability Computer Aided Design tool, ERNI-3D.     

单片机软件模拟SPI接口的解决方案

SPI接口是一种同步串行通讯接口，具备SPI接口的外围芯片十分丰富，应用非常广泛。但是，具备SPI接口的单片机种类较少。介绍了一种基于单片机的模拟SPI接口的方法，使没有SPI接口的单片机扩展带有SPI接口的外围芯片成为现实。     

Polarity control of GaN epilayers grown on ZnO templates

We report the successful growth of Ga-polar GaN epilayers on O-polar ZnO templates pre-deposited on c-sapphire. Prior to GaN growth, NH₃ is exposed onto the ZnO template. The polarity of the GaN layers is confirmed by etching of the surface and by conversion beam electron diffraction (CBED), while the O-polar ZnO is confirmed by CBED. It is suggested that the NH₃ pre-exposure helps form a Zn₃N₂ layer, which possesses inversion symmetry and inverts the crystal from anion polar to cation polar.     

TPS/TDC3000系统串口通讯的规划与应用

针对TPS/TDC30 0 0系统串口通讯方式、机理进行了一般性的介绍 ,对规划与应用中常见的的问题 ,根据实际工程应用经验提出了解决方案。     

苏北及邻区前志留基础层的综合地球物理研究

在前新生代油气资源选区评价中，前志留面之下未变质沉积地层（简称前志留基础层）的分布具有重要的参考价值。从提高纵向分辨率的处理和反演技术的应用入手，结合约束条件,利用大地电磁测深数据反演,揭示前志留面等界面的埋深和分布；同时应用小波分析技术，从磁场中分解出区域磁异常，反演结晶基底的埋深。通过这2个界面埋深的差异来分析前志留基础层的分布     

Surface electronic states in metal-porous silicon-silicon structures

The character of electronic states in porous silicon (PS)-Si, Pd-PS interfaces, and/or PS bulk at the formation of the metal-PS-silicon heterostructure was studied. The energy parameters were estimated using the deep-level transient spectroscopy and capacitance-voltage characteristics at the accounting of the voltage drop distribution along the structure. The analytical expression for voltage drop distribution along dielectric layer, porous layer and space charge region in silicon was obtained by solving the equation for continuity of the electrostatic induction vector. The electronic states studied were shown to manifest the quasi-continuous sub-band in the energy gap if the porous layer was 30-nm thick. Their density increased, as the energy position was being transformed to a deeper energy level of E_v+0.81 eV at the PS layer growing to 90 nm wide.     

Linux下网络虚接口的设计与实现

网络虚接口对特殊数据包的处理起着很大的作用。文章介绍了网络虚接口的概念，在对传统的网络接口比较分析的基础上，设计和实现了一个基于量Linux的用于对发送数据包的内容进行特殊处理的网络虚接口。     

超声处理对RTM成型复合材料界面性能的影响

在RTM成型过程中采用超声技术。探讨了超声处理的最佳工艺参数,着重研究超声处理对RTM成型复合材料界面性能的影响。结果表明,在RTM成型过程中采用超声技术增加了树脂对纤维增强体的浸润性,使树脂中的空气和成型过程中产生的气泡易于排出,从而减少了复合材料的孔隙率,进而改善复合材料的界面性能。     

液晶显示器的接口技术及其抗干扰措施

介绍了一般LCD与MCU的接口技术及其抗干扰措施，结合最近开发的绝缘油耐压测试仪中出现的CMOS自锁现象，提出了一种在强电磁场等特殊环境下，可靠使用液晶显示器的技术方法.     

COM组件接口方法参数的数据类型的选择

论述了在用 Visual C+ +建造 COM组件时 ,如何选择接口方法参数的数据类型的问题。结合客户程序是 ASP应用程序的情景 ,讨论利用 Visual C+ +和 ATL ,如何在组件程序的一端选择相应的数据类型。