一种高速并行采样实时校正方法研究

并行交替采样带来的非均匀误差严重影响采集性能.本文建立了并行交替采集系统的数学模型,实现了一种幅度非均匀误差校正的归一化算法,在误差校正系统中引入可程控参考校正源,再利用查表法同时校正系统的偏置和增益失配误差,然后对时间非均匀性参数进行估计,并通过高精度可编程时钟延时网络对其修正.实验结果表明,该校正方法实时性好,降低了硬件设计难度和成本,提高了系统性能.     

基于双平行MZM调制器和四波混频效应的高倍频微波信号的光学生成

提出了一种基于双平行Mach-Zehnder调制器(DPMZM ) 和半导体光放大器(SOA ) 的四波混频(FWM ) 效应的 24 倍频微波信号光学生成方案,具有覆盖频段高、系统结构简单 和 频谱纯度较高等优点。在本方案中,低频率的微波信号 通过 DPMZM 对光源进行调制,调节直流偏置点使 DPMZM 的两个子 MZM 和主 MZM 均偏置在最大传输点,抑制 所有 奇数边带,进一步调节两个子 MZM 的调制深度和移相器的相移,完全抑制光载波和二阶边带,得到±4阶光边带;再经 过 SOA 发生FWM效应 , 产生±12 光边带,经过光电探测器拍频后可获得 24 倍频的微波信号。最后,通过仿真实验, 以 10GHz 的微波信号为驱动信号,得到了 240GHz 的微波信号,验证了方案的可行性。     

Robust PID control of fully-constrained cable driven parallel robots

In this paper dynamic analysis and robust PID control of fully-constrained cable driven parallel manipulators are studied in detail. Since in this class of manipulators cables should remain in tension for all maneuvers in their workspace, feedback control of such robots becomes more challenging than that of conventional parallel robots. In this paper, structured and unstructured uncertainties in dynamics of the robot are considered and a robust PID controller is proposed for the cable robot. To ensure that all cables remain in tension internal force concept is used in the proposed PID control algorithm. Then, robust stability of the closed-loop system with proposed control algorithm is analyzed through Lyapunov direct method and it is shown that by suitable selection of the PID controller gains, the closed-loop system would be robustly stable. Finally, the effectiveness of the proposed PID algorithm is examined through experiments on a planar cable driven robot and it is shown that the proposed control structure is able to provide suitable performance in practice.     

32位稀疏树加法器的设计改进与实现

提出了一种改进进位运算的32位稀疏树加法器。在对现有稀疏树加法器使用的进位运算算子"o"进行深入探讨的基础上,对该算子的表达式做出了适当改进,去除了原算子中进位输入须为0的前提条件,同时保留了原算子适用于稀疏树进位结构的运算特性。采用该改进算子的32位稀疏树加法器可以并行地产生进位输入分别为0和1时的一对"和"输出,并可根据需要选择输出相应的结果。在1.2V130nm典型CMOS工艺条件下,经由HSPICE仿真,改进的32位稀疏树加法器的关键路径延迟为10.8FO4。结果表明,该加法器在运算能力得到扩充的同时,在运算速度方面也具有一定优势。     

多线程技术在自动控制系统中的应用

首先简要介绍了操作系统中多线程的概念,然后以混凝土搅拌站为实例,讲述了应用Ｗｉｎｄｏｗｓ９５下多线程技术实现自动控制中的并行控制及应注意的问题。     

并行人工蜂群算法研究

针对人工蜂群算法在处理高维度问题时收敛速度慢的问题,利用OpenMP多线程技术和规约机制,并根据已改进的观察蜂来选择雇佣蜂的方式,提出了基于OpenMP的并行人工蜂群算法（PCABC）。仿真实验分别在问题维度为100和200下进行来评估算法性能,在4个逻辑处理器环境下,基于静态调度的并行人工蜂群算法的加速比最高可以达到3.95,效率可达98.65%。实验结果表明,PCABC并行人工蜂群算法在处理高维度复杂函数时,收敛速度和算法运行时间都有较大的提升。     

Dynamically scalable dual-core pipelined processor

This article proposes design and architecture of a dynamically scalable dual-core pipelined processor. Methodology of the design is the core fusion of two processors where two independent cores can dynamically morph into a larger processing unit, or they can be used as distinct processing elements to achieve high sequential performance and high parallel performance. Processor provides two execution modes. Mode1 is multiprogramming mode for execution of streams of instruction of lower data width, i.e., each core can perform 16-bit operations individually. Performance is improved in this mode due to the parallel execution of instructions in both the cores at the cost of area. In mode2, both the processing cores are coupled and behave like single, high data width processing unit, i.e., can perform 32-bit operation. Additional core-to-core communication is needed to realise this mode. The mode can switch dynamically; therefore, this processor can provide multifunction with single design. Design and verification of processor has been done successfully using Verilog on Xilinx 14.1 platform. The processor is verified in both simulation and synthesis with the help of test programs. This design aimed to be implemented on Xilinx Spartan 3E XC3S500E FPGA.     

A Comparison of Bit-Parallel and Bit-Serial Architectures for WDM Networks

Wavelength division multiplexing (WDM) is emerging as a viable solution to reduce the electronic processing bottleneck in very high-speed optical networks. A set of parallel and independent channels are created on a single fiber using this technique. Parallel communication utilizing the WDM channels may be accomplished in two ways: (i) bit serial, where each source-destination pair communicates using one wavelength and data are sent serially on this wavelength; and (ii) bit parallel, where each source-destination pair communicates using a subset of channels and data are sent in multiple-bit words. Three architectures are studied in the paper: single-hop bit-serial star, single-hop bit-parallel star, and multi-hop bit-parallel shufflenet. The objective of this paper is to evaluate these architectures with respect to average packet delay, network utilization, and link throughput. It is shown that the Shufflenet offers the lowest latency but suffers from high cost and low link throughput. The star topology with bit-parallel access offers lower latency than the bit-serial star, but is more expensive to implement.     

基于免疫的并行单亲遗传算法研究

在分析了单亲遗传算法的优越性与存在不足的基础上，借鉴生物免疫概念与理论并结合并行计算的思想，提出了一种新的遗传算法——基于免疫的并行单亲遗传算法。理论分析和仿真结果表明，该算法不仅能够有效地保持群体多样性，而且减轻了遗传算法后期的波动现象，同时收敛速度有明显的提高。     

一种多语言机制英语在线翻译辅助系统

文中通过对以词组为本的统计式机器翻译系统(Statistical machine translation system,SMT)进行词对应方法的优化和筛选来建立多语言机制的英语在线翻译辅助系统.通过M1模型来计算平行语料库中语言字与字之间可能的配对几率,以EM演算法求取未知资料状况下的参数最大值.通过设置条件值参数作为...