DESIGN OF TWO-PHASE SINUSOIDAL POWER CLOCK AND CLOCKED TRANSMISSION GATE ADIABATIC LOGIC CIRCUIT

First the research is conducted on the design of the two-phase sinusoidal power clock generator in this paper. Then the design of the new adiabatic logic circuit adopting the two-phase sinusoidal power clocks--Clocked Transmission Gate Adiabatic Logic （CTGAL） circuit is presented. This circuit makes use of the clocked transmission gates to sample the input signals, then the output loads are charged and discharged in a fully adiabatic manner by using bootstrapped N-Channel Metal Oxide Semiconductor （NMOS） and Complementary Metal Oxide Semiconductor （CMOS） latch structure. Finally, with the parameters of Taiwan Semiconductor Manufacturing Company （TSMC） 0.25um CMOS device, the transient energy consumption of CTGAL, Bootstrap Charge-Recovery Logic （BCRL） and Pass-transistor Adiabatic Logic （PAL） including their clock generators is simulated. The simulation result indicates that CTGAL circuit has the characteristic of remarkably low energy consumption.     

电力系统3阶解析解的推导及验证

推出基于模态级数法的电力系统动态方程3阶解析解，提出求解电力系统动态方程3阶偏导数的数值微分算法。分别在单机无穷大系统及4机2区域系统，应用2个指标定量对比1阶解析解、2阶解析解及3阶解析解在分析遭受大扰动电力系统动态特性的精确性；并应用prony算法检测数值积分曲线中3阶复合模式的存在。从而，验证采用该文推出的3阶解析解分析遭受大扰动时电力系统动态特性的有效性。     

基于低速面阵CCD的正弦相位调制干涉测量

正弦相位调制(SPM)干涉测量技术用于表面形貌测量时,需要帧速高于300 frame/s的图像传感器,同时要求调制信号频率与图像传感器帧速成确定的整数倍关系。提出一种基于低速CCD(30 frame/s)的帧速可调的高速图像传感技术,通过控制每帧像素总数提高CCD帧速,研制出一种高帧速图像传感器,帧速可达300~1600 frame/s,且每帧大小连续可调。将该CCD传感器用于正弦相位调制干涉泰曼-格林干涉仪,测量镀膜玻璃板表面形貌,当CCD图像传感器的帧速与调制信号频率呈16,8,4倍的关系时,得到玻璃板表面形貌的轮廓平均算术偏差Ra小于1.8 nm,重复精度优于3 nm。     

基于XC164单片机的智能化三相正弦波变频电源

基于单片机智能化和开关电源高效率的特点,研制出一种以XC164单片机作为核心控制模块的智能型三相正弦波变频电源。讨论了系统的硬件、软件设计和正弦脉宽调制(SPWM)波的生成和输出稳压方案的设计,采用了实时电压跟踪SPWM技术,使单片机在变频电源系统中得到了有效的应用。实验结果表明该系统具有良好的稳压性能和很小的波形失真,并且能够进行自检测、过流、过压、过热和短路保护等功能。     

Linear set-membership state estimation with unknown but bounded disturbances

In this article, we consider the problem of discrete-time linear state estimation when at every discrete instant Δ the Euclidean norm of the discrete-time disturbance ‖w(Δ)‖₂ is bounded within some known value. Specifically, given a hypersphere that contains the uncertain disturbance signal w(Δ) and an ellipsoid containing the uncertain system state x(Δ) at time step Δ, a sub-optimal approach to computing a linear minimax filter which constructs a minimal ellipsoid to contain x(Δ?+?1) is derived. A distinct feature of our approach when compared to earlier solutions is that both the filter and the performance bound can be pre-computed off-line.     

A polynomial approach to discrete-time non-linear system controllability

This paper uses a polynomial approach to present a necessary and sufficient condition for local controllability of single-input single-output (SISO) discrete-time non-linear systems. The condition is presented in terms of common factors of a non-commutative polynomial expression. This extends the result on controllability of linear systems and the recent result on controllability of continuous-time non-linear systems to expose controllability of discrete-time non-linear systems in the input–output framework. The controllability condition yields a finite step computing procedure for examining controllability of discrete-time input–output non-linear systems.     

具有外部扰动的离散广义系统有限时间控制

讨论一类具有有限能量的外部扰动的线性离散广义系统的有限时间控制问题。分析问题可解性,得到该问题可解的充分条件,通过状态反馈控制器和输出反馈控制器的设计,给出实现闭环系统有限时间有界的充分条件,这些充分条件可以转化为线性矩阵不等式(LMI)的可行解问题,可借助Matlab中的LMI工具箱求解,最后通过数值算例验证该方法的...     

基于闭环跟踪法的正余弦编码器细分技术

位置传感器精度直接影响到伺服系统的控制性能,正余弦编码器细分技术是目前获取高分辨率位置检测精度的主要手段.针对常规细分算法计算时间长的缺点,研究正余弦编码器解码的实现方法和闭环跟踪细分算法,给出细分算法实现框图和设计参数,缩短计算时间,大大提高了测速范围和细分精度.最后在ARM处理器上实现该算法,采样计算频率达500k...     

Multiphase sinusoidal oscillators using second generation current conveyors

A voltage-mode Multiphase Sinusoidal Oscillator realized using Second Generation Current Conveyors and only grounded passive elements is introduced in this paper. The proposed topology is suitable for realizing oscillators with both odd and even number of phases without modifying the core of the topology. Only non-inverting Current Conveyors are required for the construction of the oscillator's topology and this is a benefit from the discrete component implementation point of view. The behavior of the proposed topology has been evaluated, through experimental results, in the cases of three and six-phase oscillators.