大型浮体水弹性作用的频域分析

对大型浮体水弹性响应的频域计算方法做了综述和介绍。分别介绍了干模态法、湿模态法和直接计算方法,对于干模态法的五种结构弹性模态函数做了介绍,研究了五种模态函数下计算结果的收敛速度。对于水动力分析方法的计算量和存储量做了分析,介绍了降低计算量和存储量的一些新计算方法,实现了一种柱坐标下的多极子展开高阶边界元方法,积分方程中的固角系数和柯西主值积分均采用直接方法计算,应用该方法计算了波浪与大型弹性浮体的相互作用问题,计算结果与实验值得到很好的吻合。     

嵌入式超长指令语音压缩处理器的VLSI实现

介绍了一款语音压缩专用处理器的设计思路，使用嵌入式FLASH超长指令字系统有效的提高了芯片的处理能力，同时将增强型算术逻辑单元、乘法器、乘累加器结合在一起，在改进的哈佛体系结构上实现了微控制器与DSP的单核设计。使用存储器操作指示寄存器、分层寄存器组，能够简化子程序调用方式。该微处理器采用0．25μm CMOS工艺实现，芯片面积为25mm^2。仿真结果表明，在20MHz工作频率下，芯片处理能力与50MIPS的通用DSP相当，同时能够保持原有编码质量。该处理器能够实现多种类型的语音压缩算法，可以达到对语音算法的高保密性、低复杂度、易开发性。     

钢管超高强混凝土的强度及本构关系预测

为安全有效的应用超高强混凝土，通过加载测荷载一应变关系的方法，对钢管超高强混凝土的力学性能进行了研究。研究结果证明，超高强混凝土经钢管约束后，塑性得到很大的改善，改善的幅度随套箍指标中的增加而增加，为彻底改善超高强混凝土的塑性，套箍指标中应≥0．48。推导出钢管高强超高强混凝土强度的计算公式和预测其本构关系的数学模型，结果证明强度计算值和本构关系预测结果与实测值吻合良好。     

应用VHDL语言的FFT算法实现

针对目前数字信号处理中大量采用的FFT算法都需要软件来处理的问题，基于FFT算法的原理，采用硬件描述语言(VHDL)和现场可编程逻辑门阵列(FPGA)，建立了算法逻辑的硬件模型，并编程实现其逻辑运算功能，完成了FFT算法的硬件描述，经测试表明，数字信号的处理速度提高了10％～20％，特别适用于复杂信号的频谱分析，增强了数据处理的可靠性和稳定性。     

甚低码率视频编码

随着新的电信服务与应用的出现，对甚低码率（６４ｋｂ／ｓ以下）视频编码的需求大大增加．文中从波形编码和模型编码两方面介绍了甚低码率视频编码技术的进展，探讨了存在的问题．     

一种基于小波分析的多分辨运动补偿视频编码器的设计

为了在甚低比特率下实现对数字视频的有效压缩和编码,提出了一种混合的多分辨运动补偿零树视频编码方案。在该编码方案中,运动矢量的获取采用了可变块大小的多分辨运动估计算法,运动估算在小波域中进行。编码器的核心部分是同基于内容的自适应量化方法相结合的预测误差帧的小波零树编码,它产生了一种具有嵌入特征的比特流,从而为精确的速率控制和基于内容的位流调节提供了可能。基于上述编码方案的实验表明:在甚低比特率下,所提出的编码方案在峰值信噪比和恢复视频的主观质量方面都具有较好的性能。     

Incorporation of Very Insoluble Monomers in Waterborne Coatings

The benefits of polymerizing very insoluble monomers in aqueous media, avoiding the use of energy‐intensive procedures, by implementing two novel synthesis techniques based on the emulsifier combination in emulsion polymerization and on miniemulsification by phase inversion temperature are investigated. The performance of standalone polymers consisting of monomers, namely lauryl methacrylate, isobornyl acrylate, and 1H,1H,2H,2H‐perfluorodecyl acrylate, and of formulated binders with these monomers incorporated either through blending or in situ polymerization, is evaluated with special emphasis on their water‐barrier properties (e.g., uptake, whitening, immersion, and vapor resistance) and on their chemical resistance. The performance of the standalone polymers is found to be similar to that of polymers prepared by high‐shear miniemulsion polymerization, while the performance of the formulated binders is generally superior to a commercial coating formulation based on a binder recommended for water resistance.     

Highly efficient VLSI architecture for DWT with low-storage implementation

With the gradual increase in image resolution of the spacecraft camera, it is highly required to figure out the problem how to process a huge amount of image data on board at a high speed. As a solution, the CCSDS proposes a space-oriented image-coding standard. For the sake of high image-coding performance, it adopts wavelet transformation as a method of image data transformation. However, wavelet transformation contains multi-level data processing, which causes more computational time consumption and more memory utilization. In order to solve this problem, we propose a highly efficient VLSI architecture for DWT with low-storage. By revising the traditional lifting structure and employing time-multiplex data processing strategy to perform the second and third level of wavelet transformation by the same logic module, the usage of logic resource is reduced with no sacrifice on speed.Using a small amount of on-chip memory instead of off-chip memory to save certain parts of DWT coefficients and sending the coefficients in a specific sequence to entropy coder timely, the off-chip memory for storage of DWT coefficients is no longer required. The proposed VLSI architecture of DWT is already implemented on the Xilinx FPGA XC4VSX55, which can achieve a high performance, in terms of data throughput, reaching 95.91MPixels/s.     

极低放废物的填埋处置

极低放废物所含放射性水平很低,可以采用简易和经济的填埋方法处置。本文概述了区分极低放废物的意义,极低放废物的定义和限值,介绍了国外极低放废物的处置方法,并对我国的极低放废物处置提出了建议意见。     

High‐tuning‐range CMOS band‐pass IF filter based on a low‐Q cascaded biquad optimization technique

A design procedure for high‐order continuous‐time intermediate‐frequency band‐pass filters based on the cascade of low‐Q biquadratic cells is presented. The approach is well suited for integrated‐circuit fabrication, as it takes into account the maximum capacitance spread dictated by the available technology and maximum acceptable sensitivity to component variations. A trade‐off between noise and maximum linear range is also met. A novel, wide‐tuning‐range transconductor topology is also described. Based on these results, a 10‐pole band‐pass filter for a code division multiple‐access satellite receiver has been designed and tested. The filter provides tunable center frequency (f₀) from 10 to 70 MHz and exhibits a 28‐MHz bandwidth around f₀ = 70 MHz with more than 39‐dB attenuation at f₀/2 and 2f₀. Third‐order harmonic rejection is higher than 60 dB for a 1‐Vpp 70‐MHz input, and equivalent output noise is lower than 1 mV_rms. The circuit is fabricated in a 0.25‐µm complementary metal oxide semiconductor process, and the core consumes 12 mA from a 2.5‐V supply, offering the best current/pole ratio figure. The die area resulted to be 0.9 × 1.1 mm². Copyright © 2014 John Wiley & Sons, Ltd.