The Significance of Crack Initiation Stage in Very High Cycle Fatigue of Steels

Different stages of the Very High Cycle Fatigue (VHCF) crack evolution in tool steels have been explored using a 20 kHz ultrasonic fatigue testing equipment. Extensive experimental data is presented describing VHCF behaviour, strength and crack initiating defects in an AISI H11 tool steel. Striation measurements are used to estimate fatigue crack growth rate, between 10^?8 and 10^?6 m/cycle, and the number of load cycles required for a crack to grow to critical dimensions. The growth of small fatigue cracks within the “fish‐eye” is shown to be distinctively different from the crack propagation behaviour of larger cracks. More importantly, the crack initiation stage is shown to determine the total fatigue life, which emphasizes the inherent difficulty to detect VHCF cracks prior to failure. Several mechanisms for initiation and early crack growth are possible. Some of them are discussed here: crack development by local accumulation of fatigue damage at the inclusion – matrix interface, hydrogen assisted crack growth and crack initiation by decohesion of carbides from the matrix.     

面向VLSI的快速最小二乘自适应算法

该文章是自适应算法在实际系统中应用的一个尝试,它对基于QR分解的快速最小二乘自适应算法进行改进,打破了运算步骤之间的数据相关性,使算法能够由多个运算单元并发执行;同时,对运算形式进行了变形,使其适于由坐标旋转计算宏单元来完成．最后提出了整个系统的设计方案,并对其中的重要部分进行了详细讨论．系统设计中采用了一维拓扑结构,使得系统的硬件开销与系统阶数成线性关系,该系统具有很高的并行流水性和数据采样速率．     

超长寿命疲劳破坏行为的可靠性研究

为了进行超长寿命疲劳破坏行为的可靠性研究,对GCr15钢超长寿命疲劳S-N试验数据进行了统计评估,采用Bansqun模型描述了其S-N曲线关系,建立了其概率S-N曲线模型,并采用SEV方法和Murakami方程分别预测了钢中最大夹杂尺寸和其相对应的疲劳强度。结果表明:其超长寿命疲劳S-N数据能较好地服从三参数威布尔分布,其概率S-N曲线形式都呈现持续下降的趋势;在验证了最大夹杂尺寸服从Gumbel分布的基础上,SEV方法预测的最大夹杂尺寸随着钢体积的增大而线性增加,Murakami方程预测的结果揭示了其概率S-N曲线呈现持续下降的原因。     

Progress in modification of sunflower oil to expand its industrial value

Increasing the sunflower seed oil content as well as improving its quality makes it compatible for industrial demands. This is an important breeding objective of sunflower which increases its market value and ensures high returns for the producers. The present review focuses on determining the progress of improving sunflower seed oil content and modifying its quality by empirical and advanced molecular breeding methods. It is known that the sunflower oil content and quality have been altered through empirical selection methods and mutation breeding programmes in various parts of the world. Further improvement in seed oil content and its components (such as phytosterols, tocopherols and modified fatty acid profile) has been slowed down due to low genetic variation in elite germplasm and complex of hereditary traits. Introgression from wild species can be carried out to modify the fatty acids profile and tocopherol contents with linkage drags. Different transgenes introduced through biotechnological methods may produce novel long‐chain fatty acids within sunflower oil. Bio‐engineering of sunflower oil could allow it to be used in diverse industrial products such as bio‐diesel or bio‐plastics. These results showed that past and current trends of modifying sunflower oil quality are essential for its further expansion as an oilseed crop. © 2017 Society of Chemical Industry     

550 kV GIS变电站中VFTO仿真计算及抑制措施

在气体绝缘变电站GIS(gas insulated substation)中,隔离开关进行分合母线时引起的特快速暂态过电压VFTO(very fast transient overvoltage)威胁站内设备安全,深入认识VFTO的特点并提出适当的抑制措施对于保障GIS变电站的安全具有重要意义.选取深圳某550 kV ...     

非晶硅顶电池中的n型掺杂层对非晶硅/微晶硅叠层太阳电池性能的影响

采用超高频等离子增强化学气相沉积(VHF-PECVD)技术,逐次高速沉积非品硅顶电池及微晶硅底电池,形成pin/pin型非晶硅/微晶硅叠层电池.通常顶电池的n层与底电池的P层均采用微晶硅材料来形成隧穿复合结,然而该叠层电池的光谱响应测试结果表明,顶电池存在着明显的漏电现象.针对该问题作者提出,在顶电池的微品硅n层中引入非晶硅n保护层的方法.实验结果表明,非晶硅n层的引入有效地改善了顶电池漏电的现象;在非晶硅n层的厚度为6nm时,顶电池的漏电现象消失,叠层电池的开路电压由原来的1.27提高到1.33V,填允因子由60%提高剑63%.     

0.18μm工艺下p-n结电荷收集的三维TCAD模拟

采用三维TCAD模拟的手段,针对0.18μm工艺下的真实p-n结,研究了偏雎、温度、衬底掺杂浓度和LET对辐射诱导的SET电流脉冲的影响.研究结果表明,在1.62～1.98V的范围内,偏压对电流脉冲的形状有明显影响,而对2ns内的电荷收集总量几乎没有影响;电流脉冲峰值和2ns内的电荷收集总量均随着温度的增加而降低,但温度对电流脉冲峰值的影响更大,而对电荷收集总量的影响相对较小;在典型的现代工艺条件下,衬底掺杂浓度的起伏对单粒子加固性能的影响基本可以忽略;电流脉冲的峰值和电荷收集量二者均随着LET的增加而增加.     

ASIC Design of Floating-Point FFT Processor

An application specific integrated circuit (ASIC) design of a 1024 points floating-point fast Fourier transform(FFT) processor is presented. It can satisfy the requirement of high accuracy FFT result in related fields. Several novel design techniques for floating-point adder and multiplier are introduced in detail to enhance the speed of the system. At the same time, the power consumption is decreased. The hardware area is effectively reduced as an improved butterfly processor is developed. There is a substantial increase in the performance of the design since a pipelined architecture is adopted, and very large scale integrated (VLSI) is easy to realize due to the regularity. A result of validation using field programmable gate array (FPGA) is shown at the end. When the system clock is set to 50 MHz, 204.8 μs is needed to complete the operation of FFT computation.     

甚短距离光传输中保护和错误检测通道的实现

简要介绍了甚短距离VSR4-01.0光传输系统,通过实现保护通道和错误检测通道的功能,以确保光纤数据传输的正确性．采用Verilog HDL语言设计保护通道和错误检测通道,并进行了仿真．选用Altera公司的Mercury EP1M350F780C5 FPGA芯片进行了逻辑功能的仿真和验证。