前向反冲分析和非卢瑟福背散射

介绍了弹性散射分析中的另外两种分析方法——前向反冲分析和非卢瑟福背散射分析。前向反冲分析适用于材料中H和He同位素分析。高能质子和He离子背散射分析可提高对重基体中C,N和O等轻元素分析的灵敏度。给出了这两种分析方法的应用实例。     

Voltage sag compensation with minimum energy injection by use of a micro‐SMES

This paper presents a method to compensate voltage sags with minimum energy injection for a series‐connected voltage restorer using a micro‐SMES. A circuit for extracting the fundamental symmetrical components from sag voltages and a minimum energy injection algorithm is described. Simulations of voltage sag compensation have been carried out using PSCAD/EMTDC for various faults. The simulation results confirm the validity of the proposed method and show the possibility of reducing the size of energy storage devices. © 2002 Wiley Periodicals, Inc. Electr Eng Jpn, 141(3): 70–80, 2002; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.10047     

引进综采设备常用渐开线花键的标准及计算

根据煤矿引进的综采设备中采用不同标准渐开线花键的特点 ,提出了综采设备常用渐开线花键的测量与计算     

A Symbolic Pole/Zero Extraction Methodology Based on Analysis of Circuit Time-Constants

This paper introduces a methodology for symbolic pole/zero extraction based on the formulation of the time-constant matrix of the circuits. This methodology incorporates approximation techniques specifically devoted to achieve an optimum trade-off between accuracy and complexity of the symbolic root expressions. The capability to efficiently handle even large circuits will be demonstrated through several practical circuits.     

挖金湾矿近距离煤层联合布置开采可行性研究

提出挖金湾矿近距离煤层联合布置开采方案，并对开采方案的技术难点进行了分析，找出了解决方法。     

Use of radial forces for fault detection in tapping

A model-based method for fault detection in tapping based on torque and radial forces is proposed. The method allows the identification of faults typical of a tapping operation including axial misalignment, tap runout, tooth breakage both singly and together. The validation experiments have been run on aluminum 356 workpieces for different combinations of process faults. Results have shown that the model predictions are in good agreement with the experimental radial force and torque signals under various fault conditions.     

流量自动控制的设计与实现

文章通过分析多相流模拟井的实际工作要求 ,提出了简单实用的流量自动控制模型。应用成型的计算机数据采集和控制模块及稳定可靠的流量控制部件 ,实现了各相流量的自动控制过程。该流量自动控制系统调节精度高、速度快、整体造价低 ,在实际应用中取得了良好的效果。     

预应力钢筒混凝土管穿越地下管线的施工措施

文中介绍了预应力钢筒混凝土管的概念、优越性，并结合山西省万家寨联接段引黄工程的实际施工，总结出了穿越各种地下管线的施工经验。     

Fast microwave detection system for coherent synchrotron radiation study at KEK: Accelerator test facility

A fast room temperature microwave detection system based on the Schottky Barrier-diode detector was created at the KEK ATF (Accelerator Test Facility). It was tested using Coherent Synchrotron Radiation (CSR) generated by the 1.28 GeV electron beam in the damping ring. The speed performance of the detection system was checked by observing the CSR from a multi-bunch (2.8 ns bunch separation time) beam. The theoretical estimations of CSR power yield from an edge of bending magnet as well as new injection tuning method are presented. A very high sensitivity of CSR power yield to the longitudinal electron distribution in a bunch is discussed.     

A VLSI architecture for a half-edge-based corner detector

Corner detection is a low-level feature detection operator that is of great use in image processing applications, for example, optical flow and structure from motion by image correspondence. The detection of corners is a computationally intensive operation. Past implementations of corner detection techniques have been restricted to software. In this paper we propose an efficient very large-scale integration (VLSI) architecture for detection of corners in images. The corner detection technique is based on the half-edge concept and the first directional derivative of Gaussian. Apart from the location of the corner points, the algorithm also computes the corner orientation and the corner angle and outputs the edge map of the image. The symmetrical properties of the masks are utilized to reduce the number of convolutions effectively, from eight to two. Therefore, the number of multiplications required per pixel is reduced from 1800 to 392. Thus, the proposed architecture yields a speed-up factor of 4.6 over conventional convolution architectures. The architecture uses the principles of pipelining and parallelism and can be implemented in VLSI.