Robust ℋ︁∞ PID control for multivariable networked control systems with disturbance/noise attenuation

In this paper, we study the design problem of PID controllers for networked control systems (NCSs) with polyhedral uncertainties. The load disturbance and measurement noise are both taken into account in the modeling to better reflect the practical scenario. By using a novel technique, the design problem of PID controllers is converted into a design problem of output feedback controllers. Our goal of this paper is two‐fold: (1) To design the robust PID tracking controllers for practical models; (2) To develop the robust ??_∞ PID control such that load and reference disturbances can be attenuated with a prescribed level. Sufficient conditions are derived by employing advanced techniques for achieving delay dependence. The proposed controller can be readily designed based on iterative suboptimal algorithms. Finally, four examples are presented to show the effectiveness of the proposed methods. Copyright © 2011 John Wiley & Sons, Ltd.     

Fully integrated blue/UV SOI CMOS photosensor for biomedical and environmental applications

In this paper, we present a microsystem for measuring optical power in blue/UV wavelengths (from λ = 200 nm to λ = 450 nm) which includes a photodiode and the analog processing circuit of the photodiode signal, fully integrated in 2 μm SOI CMOS technology. The photodiode has a maximum responsivity for λ = 400 nm. Th photosensor functions as a current to frequency converter. Measurements of the microsystem illuminated by blue and UV LEDs demonstrate the good linear behavior, sensitivity and efficiency of the system.     

Comparison of contact resistance between accumulation-mode and inversion-mode multigate FETs

The performances of accumulation-mode and inversion-mode multigate FETs are compared. The influence of gate underlap on the electrical properties is analyzed. Both simulation results and experimental data show that in a device with gate underlap, accumulation-mode devices have a higher current drive, lower source and drain resistance and less process variability than inversion-mode FETs.     

FD MOS SOI circuit to enhance the ratio of illuminated to dark current of a co-integrated a-Si:H photodiode

In this paper we first present the integration of amorphous silicon photodiodes with a fully depleted silicon on isolator (FD SOI) MOSFET circuit. Taking the advantage of the better subthreshold characteristic of FD SOI MOSFETs with respect to bulk devices, a very simple SOI circuit integrated with the amorphous silicon photodiode is presented to significantly improve the ratio of the circuit output current when the diode is illuminated to when it is not. The use of one additional reference source voltage to adjust the operating point of the photodiode, allows to obtain a very significant increase in this current ratio, much higher than what can be obtained using a simple diode. Circuit solutions used to amplify the diode current under illumination are usually more complicated and involve a capacitor or more transistors than the circuit we present. All the other properties of the photodetector, as its spectral characteristic and linear dependence of detection with light intensity are maintained. The circuit can also be used in conjunction with other circuits for further amplification and/or processing.     

Developmental changes in the manifestation of a phonological deficit in dyslexic children learning to read a regular orthography.

In a longitudinal study, the development of phonological processing abilities was studied in 19 dyslexic, 17 weak, and 19 normal readers learning to read in Dutch. Among other abilities, phonological awareness and rapid automatized naming were assessed in kindergarten, in 1st grade, and in 6th grade. Dyslexic and weak readers had impairments in rapid naming from kindergarten through 6th grade. Their impairments in phonological awareness at the level of phonemes became manifest in 1st grade and tended to disappear at the end of primary school. However, in a second cross-sectional study, including 13 dyslexic and 25 normal readers, dyslexic children's awareness of phonemes was hampered when task demands increased. The various manifestations of a phonological deficit follow distinct developmental pathways. (PsycINFO Database Record (c) 2010 APA, all rights reserved)     

Analytical model for the high-temperature behaviour of the subthreshold slope in MuGFETs

As MuGFETs are promising contenders for the end of the silicon Roadmap, their high-temperature behaviour needs to be addressed. In this work we investigate the variations of the subthreshold slope (SS) of double-gate devices and MuGFETs with intrinsic doping as a function of the temperature and fin width. Focus is placed on the superlinear behaviour of SS occurring above a certain temperature threshold. Numerical simulations are performed using Comsol Multiphysics^™ and a 1D analytical model is developed. The model, which includes the effect of film and gate oxide thickness, is shown to accurately fit the numerical data. A new definition for the subthreshold slope under high-temperature operation is proposed. The high-temperature subthreshold slope degradation is shown to increase with fin width.     

Sensitivity of trigate MOSFETs to random dopant induced threshold voltage fluctuations

In this paper, we investigate random doping fluctuation effects in trigate SOI MOSFETs by solving the three-dimensional (3D) Poisson, drift-diffusion and continuity equations numerically. A single doping impurity atom is introduced in the undoped channel region of the device and the resulting shift of threshold voltage is measured from the simulated I–V characteristics. This enables the derivation of the threshold voltage shift (ΔV_TH) for any arbitrary location of the doping atom in the transistor. Based on an analysis of a sub-20 nm trigate MOSFET device, we find that the typical variation of V_TH per doping atom is a few tens of mV. Inversion-mode (IM) trigate devices are more sensitive to the doping fluctuation effects than accumulation-mode (AM) devices. The threshold voltage shift arising from doping fluctuations is maximum when the doping atom is near the center of the channel region, which means the original SOI film doping, the random contamination effects or any other impurity doping in the channel region is more important than atoms introduced in the channel by the S/D implantation process for sub-20 nm transistors.     

Effects of passive vibration absorbers on the mechanisms having clearance joints

Multibody System Dynamics - In the current study, the dynamic behavior of two planar mechanisms with revolute joints, in the presence of clearances is investigated. Subsequently, a control scheme...