Suggestions to the article: medical professionalism research characteristics and hotspots

Scientometrics - The article published on 5 July 2021 is well-written and of interest. However, some improvements could be made, such as ten Tables/Figures can be shortened to highlight the focused...     

Analysis and architecture design of variable block-size motion estimation for H.264/AVC

Variable block-size motion estimation (VBSME) has become an important video coding technique, but it increases the difficulty of hardware design. In this paper, we use inter-/intra-level classification and various data flows to analyze the impact of supporting VBSME in different hardware architectures. Furthermore, we propose two hardware architectures that can support traditional fixed block-size motion estimation as well as VBSME with less chip area overhead compared to previous approaches. By broadcasting reference pixel rows and propagating partial sums of absolute differences (SADs), the first design has the fewer reference pixel registers and a shorter critical path. The second design utilizes a two-dimensional distortion array and one adder tree with the reference buffer that can maximize the data reuse between successive searching candidates. The first design is suitable for low resolution or a small search range, and the second design has advantages of supporting a high degree of parallelism and VBSME. Finally, we propose an eight-parallel SAD tree with a shared reference buffer for H.264/AVC integer motion estimation (IME). Its processing ability is eight times of the single SAD tree, but the reference buffer size is only doubled. Moreover, the most critical issue of H.264 IME, which is huge memory bandwidth, is overcome. We are able to save 99.9% off-chip memory bandwidth and 99.22% on-chip memory bandwidth. We demonstrate a 720-p, 30-fps solution at 108 MHz with 330.2k gate count and 208k bits on-chip memory.     

Reliability investigation of 0.07-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel

The authors have investigated the reliability performance of G-band (183 GHz) monolithic microwave integrated circuit (MMIC) amplifiers fabricated using 0.07-/spl mu/m T-gate InGaAs-InAlAs-InP HEMTs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel on 3-in wafers. Life test was performed at two temperatures (T/sub 1/ = 200 /spl deg/C and T/sub 2/ = 215 /spl deg/C), and the amplifiers were stressed at V/sub ds/ of 1 V and I/sub ds/ of 250 mA/mm in a N/sub 2/ ambient. The activation energy is as high as 1.7 eV, achieving a projected median-time-to-failure (MTTF) /spl ap/ 2 /spl times/ 10/sup 6/ h at a junction temperature of 125 /spl deg/C. MTTF was determined by 2-temperature constant current stress using /spl Delta/G/sub mp/ = -20% as the failure criteria. The difference of reliability performance between 0.07-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel and 0.1-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with In/sub 0.6/Ga/sub 0.4/As channel is also discussed. The achieved high-reliability result demonstrates a robust 0.07-/spl mu/m pseudomorphic InGaAs-InAlAs-InP HEMT MMICs production technology for G-band applications.     

Enterococcal bacteremia in a medical center

BACKGROUND: The enterococci have become important nosocomial pathogens. They can cause multiple site infections and enterococcal bacteremia becomes more frequently associated with a high mortality rate. Previous studies of enterococcal bacteremia showed a variety of results. To establish the significance and importance of enterococci as nosocomial pathogens in this hospital, to characterize their clinical pictures and to search for the risk factors for mortality, this retrospective study was performed. METHODS: There were 208 cases of enterococcal bacteremia which occurred from 1988 to 1992. Twenty-seven cases had no medical charts, dismissing possibility of evaluation. Finally, 181 cases of enterococcal bacteremia were analysed. RESULTS: One hundred and eighteen episodes were nosocomial infections. Polymicrobial bacteremia occurred in 68.5% of the patients and the most common co-isolate was Pseudomonas aeruginosa. Those patients (78.5%) with underlying diseases and malignancies were the most common underlying problems. The portal of entry could be found in 69.6 percent of patients, with the gastrointestinal tract the most common sources. Antimicrobial susceptibility testing showed high gentamicin resistance rate (89.5%), and ampicillin still had about 80 percent sensitivity rate. The group who received specific antibiotic therapy for enterococcus showed lower mortality (36.4% versus 47.6%). Only one case had infective endocarditis. Forty-nine patients suffered from septic shock, the cause of 30 deaths. Totally 75 patients died during hospitalization. Besides sepsis, another major cause of death was their underlying diseases itself. CONCLUSIONS: Enterococci have no doubt become important nosocomial pathogens and enterococcal bacteremia were associated with high mortality, especially in elderly patients with underlying diseases such as malignancy or diabetes. When clinically dealing with sepsis from the gastrointestinal or biliary tract, especially when previous cephalosporins therapy showed no response, the possibility of enterococcal bacteremia should always be considered.     

Testing the dynamic full access property of a class of multistageinterconnection networks

The banyan network, and networks topologically equivalent to it, have recently been adopted as interconnection networks in multiprocessor systems. Often, a multiprocessor system is reconfigured when the banyan network becomes faulty. It is possible to avoid a complicated reconfiguration process as long as the faulty banyan network still possesses the dynamic full access (DFA) property. In this paper, we determine a necessary and sufficient condition for a faulty banyan network to possess the DFA property and design a test procedure based on the condition. The test procedure can be used to decompose a faulty banyan network into subsystems possessing the DFA property. We also evaluate the probability that a banyan network loses the DFA property, given the number of faulty switching elements. It is found that as long as faults do not occur in switching elements located in the first and last stages, this probability is very small, even when there are quite a few faulty switching elements