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展示了一种基于新型自组装微带-波导过渡的D波段(110-170GHz)发射机模块。过渡结构的仿真平均插入损耗为0.6 dB,回波损耗于带内基本优于10 dB。基于该过渡结构以及阻性混频器和倍频器芯片,设计了一种D波段发射机模块。该发射机模块工作于110-153 GHz,峰值输出功率于150 GHz可达-4.6 dBm,3-dB带宽为145.8-159.3 GHz。使用该模块进行了64-QAM高阶无线通信测试,测试传输速率为3 Gb/s,验证了模块封装方案的实用性。  相似文献   
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展示了一种基于新型自组装微带-波导过渡的D波段(110~170 GHz)发射机模块.过渡结构的仿真平均插入损耗为0. 6 d B,回波损耗于带内基本优于10 d B.基于该过渡结构以及阻性混频器和倍频器芯片,设计了一种D波段发射机模块.该发射机模块工作于110~153 GHz,峰值输出功率于150 GHz可达-4. 6 d Bm,3d B带宽为145. 8~159. 3 GHz.使用该模块进行了64-QAM高阶无线通信测试,测试传输速率为3 Gb/s,验证了模块封装方案的实用性.  相似文献   
3.
The complexity/performance balanced decoder for low-density parity-check (LDPC) codes is preferred in practical wireless communication systems. A low complexity LDPC decoder for the Consultative Committee for Space Data Systems (CCSDS) standard is achieved in DSP. An approximate decoding algorithm, normalized min-sum algorithm, is used in the implementation for its low amounts of computation. To reduce the performance loss caused by the approximation, the parameters of the normalized min-sum algorithm are determined by calculating and finding the minimum value of thresholds through density evolution. The minimum value which indicates the best performance of the decoding algorithm is corresponding with the optimized parameters. In implementation, the memory cost is saved by decomposing the parity-check matrix into submatrices to store and the computation of passing message in decoding is accelerated by using the intrinsic function of DSP. The performance of the decoder with optimized factors is simulated and compared with the ideal BP decoder. The result shows they have about the same performance.  相似文献   
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