Studies on Helium Liquids by Vibrating Wires and Quartz Tuning Forks

We present results of low-temperature experiments on dilute mixtures of ³He in ⁴He and on pure ³He, obtained by means of two kinds of mechanical oscillators immersed in the liquid sample: vibrating wires and quartz tuning forks. The helium sample was cooled either by adiabatic demagnetization of an immersed copper nuclear stage or by adiabatic melting of ⁴He in superfluid ³He. The measured effect of the surrounding fluid on the mechanical resonance of the oscillators is compared with existing theories. We also discuss resonances of second sound and the state of supersaturation, both observed by a tuning fork in helium mixtures.     

Fabrication of Ni-shims using UV-moulding as an intermediate step

We fabricated nickel-shims including various types of structures with dimensions from hundreds of nanometers to several microns. The mastering process was made by electron-beam lithography, lift-off and reactive ion etching techniques. Then the structures were copied into a UV-curable ORMOCER-material and the Ni-shims were fabricated by electroforming using UV-copies as masters. The experiments showed that the use of UV-copying evades typical quartz master sticking and cracking problems. Furthermore, all features were replicated in the final Ni-shim as they existed in the quartz master proving the method suitable for the fabrication of the Ni-shims from the quartz masters with high precision.     

A 700 MHz laser radar receiver realized in 0.18 μm HV-CMOS

This study presents a CMOS receiver chip realized in 0.18 µm High-Voltage CMOS (HV-CMOS) technology and intended for high precision pulsed time-of-flight laser range finding utilizing high-energy sub-ns laser pulses. The IC chip includes a trans-impedance preamplifier, a post-amplifier and a timing comparator. Timing discrimination is based on leading edge detection and the trailing edge is also discriminated for measuring the width of the pulse. The transimpedance of the channel is 25 kΩ, the uncompensated walk error is 470 ps in the dynamic range of 1:21,000 and the input referred equivalent noise current 450 nA (rms).     

On-chip offset generator for accurate integral non-linearity testing of A/D converters and D/A-A/D converter pairs

It has recently shown how a constant dc offset between two low-quality test signals can be used to test the integral nonlinearity (INL) of A/D converters (ADCs) without an accurate test stimulus, and how the same method can be used to test the INL of D/A converters (DACs) as well. We propose here an on-chip offset generator for producing the constant offset and analyse its limitations. Experimental tests on the 122 × 22 μm² offset generator fabricated in 130 nm CMOS process show that it can be used to test the INL of 12-b DACs and ADCs. The generator is rail-to-rail capable so that almost the whole input/output range of converters can be tested. Moreover, if the proposed offset generator is used in a ratiometric test setup as proposed here as well, the influence of a reference voltage drift on measurement accuracy is cancelled out. Because of its small size, simple design, rail-to-rail capability and immunity to reference voltage changes, the proposed offset generator is well suited for built-in self-test usage.     

Comparison of Two Integrated BiCMOS 950 MHz Direct I/Q Modulators

Two integrated direct I/Q modulators suitable for directupconversion with an output frequency of 950 MHz and baseband frequencies of60 to 500 kHz are fabricated in a 1.2 µm and 0.8 µm BiCMOSprocess, respectively, and their performance under various operatingconditions is discussed. The modulators use different phase shiftertopologies, one of which is based on digital CML latches and the other ondifferential pairs with resistive and capacitive emitter degeneration. Bothcircuits are operated using a single 5 V supply and they consume 50 mA or115 mA depending on the topology. The main properties of the CML modulatorare, for example, an output power of –11 ± 0.5 dBm at 100 MHzand –15 ± 2.25 dBm at 950 MHz over the temperature range of–10 to +85°C, LO suppression of 38 dBc and image rejection of41 dBc.     

Integrated Time-to-Digital Converters Based on Interpolation

The main features of two time-to-digital convertersbased on interpolation are presented, together with some measurementresults. The first converter is based on digital delay line interpolatorsand has been implemented in a 1.2 µm CMOS process.It has a single-shot resolution of 1 ns (-value)and a nonlinearity less than ±50 ps in the measurementrange 5 to 500 ns. The power consumption of the circuit is 15mW. The second time digitizer has analog interpolators basedon time-to-voltage conversion and has been implemented in a 1.2 µm BiCMOS process. It has a single-shot resolutionof 50 ps and a nonlinearity less than 150 ps in the measurementrange 1 to 300 ns. The power consumption of this circuit is 200mW.     

Considerations for Synchronization in Body Area Networks for Human Activity Monitoring

In this paper, we highlight considerations for synchronization issues in body area networks. Requirements for the synchronization accuracy in body area networks depend on the application at hand. Synchronization may be needed for power management, sample ordering, calculation of stimulus responses and for sensor fusion. This paper provides a theoretical exercise to help understand the accuracy required for typical human motion sensing. It gives an overview of various synchronisation strategies used and implemented in prototype systems. Lessons learnt from practical implementations using Bluetooth, an IEEE 802.15.4 proprietary network and Nanonet are presented to illustrate the principles involved. The discussion provides some considerations and the requirements for typical WBAN applications.     

A framework for local and regional energy system integration between industry and municipalities—Case study UPM-Kymmene Kaukas

The integration of different energy systems, e.g., industrial and municipal, is potentially important for the efficient utilization of energy. It is important that the tools for analysing this type of integration can handle the energy systems on different levels, e.g., regional, site, plant and process levels. In this work, a framework for investigating the cost-efficient integration of large-scale energy systems is presented and tested at the UPM-Kymmene Kaukas pulp and paper plant and in the municipality of Lappeenranta, Finland. In addition to the different levels, the framework also aims to take into account several sub-problems, e.g., fuel logistic, optimal heat exchanger network and overall efficiency versus flexibility. The case in question shows that the presented framework can be used as a systematic tool for analysing the potential of integrating large energy systems and that it is able to handle both the synthesis of flexible heat exchanger networks and analyse the cost-efficiency of changes to the existing systems.