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排序方式: 共有135条查询结果,搜索用时 847 毫秒
1.
T. Braun K.-F. Becker M. Koch V. Bader R. Aschenbrenner H. Reichl 《Microelectronics Reliability》2005,45(9-11):1672
Automotive under-the-hood electronics often have to withstand temperatures up to 175 °C in combination with harsh environment conditions. This paper gives an overview about the reliability potential of epoxy based encapsulants for automotive applications. Therefore the resistance of epoxy molding compound against typical automotive fluids at temperature of use is analyzed. Six epoxy molding compounds available on the market, showing high temperature automotive potential have been carefully selected to undergo a media resistance testing. For this purpose a dedicated mold tool has been designed and manufactured to prepare these encapsulants for material testing. Thermo-mechanical, mechanical and thermal properties had been determined in initial state directly after molding and after storage in aggressive fluids typical for automotive applications as e.g. gas oil, automatic transmission fluid (ATF), brake fluid or accumulator acid at the respective temperature of use. 相似文献
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Interlayer cooling potential in vertically integrated packages 总被引:2,自引:1,他引:1
T. Brunschwiler B. Michel H. Rothuizen U. Kloter B. Wunderle H. Oppermann H. Reichl 《Microsystem Technologies》2009,15(1):57-74
The heat-removal capability of area-interconnect-compatible interlayer cooling in vertically integrated, high-performance chip stacks was characterized with de-ionized water as coolant. Correlation-based predictions and computational fluid dynamic modeling of cross-flow heat-removal structures show that the coolant temperature increase due to sensible heat absorption limits the cooling performance at hydraulic diameters ≤200 μm. An experimental investigation with uniform and double-side heat flux at Reynolds numbers ≤1,000 and heat transfer areas of 1 cm2 was carried out to identify the most efficient interlayer heat-removal structure. The following structures were tested: parallel plate, microchannel, pin fin, and their combinations with pins using in-line and staggered configurations with round and drop-like shapes at pitches ranging from 50 to 200 μm and fluid structure heights of 100–200 μm. A hydrodynamic flow regime transition responsible for a local junction temperature minimum was observed for pin fin in-line structures. The experimental data was extrapolated to predict maximal heat flux in chip stacks having a 4-cm2 heat transfer area. The performance of interlayer cooling strongly depends on this parameter, and drops from >200 W/cm2 at 1 cm2 and >50 μm interconnect pitch to <100 W/cm2 at 4 cm2. From experimental data, friction factor and Nusselt number correlations were derived for pin fin in-line and staggered structures. 相似文献
4.
R-Curve Behavior of Long Cracks in Alumina 总被引:1,自引:0,他引:1
R.W. Steinbrech A. Reichl W. Schaarwächter 《Journal of the American Ceramic Society》1990,73(7):2009-2015
Coarse-grained alumina is among those monolithic ceramics which can exhibit an increase in crack resistance with crack extension. This R -curve behavior is most pronounced for intergranular fracture and does not depend exclusively on material properties. Crack and specimen geometries also influence the shape of the R -curves. The magnitude of the effect increases with increasing crack surface roughness, which is microstructure-dependent, and with crack-opening displacement, which is geometry-dependent. Based on experimental observations, a "dynamic" R -curve model is presented which relates the increasing resistance to an increasing crack tip shielding caused by crack surface bridging. Applying a J -integral approach, R -curves are calculated for two specimen geometries (short double cantilever beam and single-edged notched beam) and different grain sizes. The good agreement between calculation and experiment indicates that the R -curve behavior of long cracks in alumina can be predicted by a simple wake model. 相似文献
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With the ongoing efforts on the European level to promote energy efficiency, the need for the development of harmonised evaluation
criteria for energy efficiency measures arises. Such criteria will allow extensive comparisons of the success or failure of
the implementation of energy efficiency measures throughout Europe and will support the development of a first–best strategy
for the realisation of energy savings targets in Europe. Two fundamental evaluation possibilities exist: bottom-up and top-down
quantifications of energy savings. Bottom-up calculations give a more detailed view of the impact of energy efficiency measures
but are much more costly and time consuming than top-down calculations. In our opinion, this effort can be reduced without
losing precision in the savings calculations by the homogenisation of these energy efficiency measures. In this paper, we
develop a framework specifying how such a homogenisation could look. 相似文献
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Grid tariffs are the main source of income for distribution system operators (DSOs). Reductions of tariffs increase the cost pressure on DSOs; assuming they work efficiently, tariff reductions potentially lead to a decrease of the electricity system's quality if no reliability of supply criteria are incorporated in the regulatory system. Our statistical analysis shows that the correlation between grid tariffs and electricity supply interruptions in a regulatory regime neglecting this incorporation is significant and that furthermore decreasing tariffs harm the reliability of supply even in the short run. Our econometric analysis of the influence of tariffs on reliability of supply shows a significant correlation between the grid tariffs and the duration of power outages in the Austrian electricity grid; an annual average interruption duration per installed capacity of a specific grid increases ceteris paribus by 1.36 min if the grid tariff of this specific grid is decreased in the previous year by 1€/MWh. 相似文献
9.
Topper M. Fehlberg S. Scherpinski K. Karduck C. Glaw V. Heinricht K. Coskina P. Ehrmann O. Reichl H. 《Advanced Packaging, IEEE Transactions on》2000,23(2):233-238
Size reduction is one of the main driving forces for packaging in nearly all electronic applications. The interaction of size reduction with highest functionality and high reliability is also predominant for all microelectronic systems. Therefore a synergism of optimal product design, smallest single chip package and board technology will give the best solution. Wafer level CSP will be the best solution for single chip packaging matching all requirements for electronic systems and reducing total cost 相似文献
10.
W. Reichl Dipl.-Ing. 《e & i Elektrotechnik und Informationstechnik》2003,120(6):210-214
The year 1998 marked the liberalization of the speech telephony market in the European Union. Regulatory bodies and operators were challenged to create a regulatory and technical environment in order to forge the emerging patchwork of infrastructure into a homogenous telecommunications network. In addition to regulatory proceedings it was essential to launch a multilateral forum for the discussion of administrative, operative and accounting problems. In March 1999 the Austrian Telecommunications Operator Forum (AK-TK) was formed. This article deals with the experience of four years operator’s negotiations in the emerging telecom market. 相似文献