Impact of electrically formed interfacial layer and improved memory characteristics of IrOx/high-κx/W structures containing AlOx,GdOx, HfOx,and TaOx switching materials

Improved switching characteristics were obtained from high-κ oxides AlO_x, GdO_x, HfO_x, and TaO_x in IrO_x/high-κ_x/W structures because of a layer that formed at the IrO_x/high-κ_x interface under external positive bias. The surface roughness and morphology of the bottom electrode in these devices were observed by atomic force microscopy. Device size was investigated using high-resolution transmission electron microscopy. More than 100 repeatable consecutive switching cycles were observed for positive-formatted memory devices compared with that of the negative-formatted devices (only five unstable cycles) because it contained an electrically formed interfacial layer that controlled ‘SET/RESET’ current overshoot. This phenomenon was independent of the switching material in the device. The electrically formed oxygen-rich interfacial layer at the IrO_x/high-κ_x interface improved switching in both via-hole and cross-point structures. The switching mechanism was attributed to filamentary conduction and oxygen ion migration. Using the positive-formatted design approach, cross-point memory in an IrO_x/AlO_x/W structure was fabricated. This cross-point memory exhibited forming-free, uniform switching for >1,000 consecutive dc cycles with a small voltage/current operation of ±2 V/200 μA and high yield of >95% switchable with a large resistance ratio of >100. These properties make this cross-point memory particularly promising for high-density applications. Furthermore, this memory device also showed multilevel capability with a switching current as low as 10 μA and a RESET current of 137 μA, good pulse read endurance of each level (>10⁵ cycles), and data retention of >10⁴ s at a low current compliance of 50 μA at 85°C. Our improvement of the switching characteristics of this resistive memory device will aid in the design of memory stacks for practical applications.     

Temperature-dependent electrical properties of plasma-grown gate oxides on tensile-strained Si0.993 C0.007 layers

Ultra-thin (<10 nm) gate oxides have been grown directly on tensile-strained Si_0.993 C_0.007 layers at a low temperature using microwave O₂-plasma. The changes in gate voltage (V_g), flat-band voltage (V_FB), oxide charge density (Q_ox/q) an interface state density (D_it) have been studied using a metal-oxide-semiconductor structure over the temperature range of 77–450 K. Inversion capacitance increases with temperature above 400 K, leading to a transition from high-frequency to low-frequency characteristics. The dominant types of charges in the oxide are found to be strongly temperature dependent. It is found that charge-trapping properties under Fowler–Nordheim (F–N) constant-current stressing are significantly improved with increasing temperature.     

Analysis of weakly bonded oxygen in HfO<Subscript>2</Subscript>/SiO<Subscript>2</Subscript>/Si stacks by using HRBS and ARXPS

We have used transmission electron microscopy, high-resolution Rutherford backscattering spectrometry (HRBS), and angle-resolved X-ray photoelectron spectroscopy (ARXPS) to investigate the interfacial oxidized states of hafnium oxide/silicon oxide/Si gate oxide stacks. The atomic concentrations and profiles of HRBS analysis are similar before and after annealing; however, ARXPS shows a clear difference in bond status. These results imply that weakly bonded oxygen atoms existed in the stacks alongside the suboxides. In the as-deposited layers, dioxides are found at the interfaces and suboxides in the layers whereas after annealing suboxides are found at the interfaces and dioxides are found in the layers because of redistribution of bonds during annealing. The combination of HRBS and ARXPS analyses indicated that the main oxidized states transformed from the suboxides to the dioxides with no obvious quantitative difference in the content of oxygen atoms, suggesting that reactions of the weakly bonded oxygen atoms occurred with the suboxides within the layers.     

Copper pillar and memory characteristics using Al2O3 switching material for 3D architecture

A novel idea by using copper (Cu) pillar is proposed in this study, which can replace the through-silicon-vias (TSV) technique in future three-dimensional (3D) architecture. The Cu pillar formation under external bias in an Al/Cu/Al₂O₃/TiN structure is simple and low cost. The Cu pillar is formed in the Al₂O₃ film under a small operation voltage of <5 V and a high-current-carrying conductor of >70 mA is obtained. More than 100 devices have shown tight distribution of the Cu pillars in Al₂O₃ film for high current compliance (CC) of 70 mA. Robust read pulse endurances of >10⁶ cycles are observed with read voltages of −1, 1, and 4 V. However, read endurance is failed with read voltages of −1.5, −2, and −4 V. By decreasing negative read voltage, the read endurance is getting worst, which is owing to ruptured Cu pillar. Surface roughness and TiO _x N _y on TiN bottom electrode are observed by atomic force microscope and transmission electron microscope, respectively. The Al/Cu/Al₂O₃/TiN memory device shows good bipolar resistive switching behavior at a CC of 500 μA under small operating voltage of ±1 V and good data retention characteristics of >10³ s with acceptable resistance ratio of >10 is also obtained. This suggests that high-current operation will help to form Cu pillar and lower-current operation will have bipolar resistive switching memory. Therefore, this new Cu/Al₂O₃/TiN structure will be benefited for 3D architecture in the future.     

Formation polarity dependent improved resistive switching memory characteristics using nanoscale (1.3 nm) core-shell IrOx nano-dots

ABSTRACT: Improved resistive switching memory characteristics by controlling the formation polarity in an IrOx/Al2O3/IrOx-ND/Al2O3/WOx/W structure have been investigated. High density of 1 × 1013/cm2 and small size of 1.3 nm in diameter of the IrOx nano-dots (NDs) have been observed by high-resolution transmission electron microscopy. The IrOx-NDs, Al2O3, and WOx layers are confirmed by X-ray photo-electron spectroscopy. Capacitance-voltage hysteresis characteristics show higher charge-trapping density in the IrOx-ND memory as compared to the pure Al2O3 devices. This suggests that the IrOx-ND device has more defect sites than that of the pure Al2O3 devices. Stable resistive switching characteristics under positive formation polarity on the IrOx electrode are observed, and the conducting filament is controlled by oxygen ion migration toward the Al2O3/IrOx top electrode interface. The switching mechanism is explained schematically based on our resistive switching parameters. The resistive switching random access memory (ReRAM) devices under positive formation polarity have an applicable resistance ratio of > 10 after extrapolation of 10 years data retention at 85°C and a long read endurance of 105 cycles. A large memory size of > 60 Tbit/sq in. can be realized in future for ReRAM device application. This study is not only important for improving the resistive switching memory performance but also help design other nanoscale high-density nonvolatile memory in future.     

Resistive switching memory characteristics of Ge/GeOx nanowires and evidence of oxygen ion migration

The resistive switching memory of Ge nanowires (NWs) in an IrO_x/Al₂O₃/Ge NWs/SiO₂/p-Si structure is investigated. Ge NWs with an average diameter of approximately 100 nm are grown by the vapor–liquid-solid technique. The core-shell structure of the Ge/GeO_x NWs is confirmed by both scanning electron microscopy and high-resolution transmission electron microscopy. Defects in the Ge/GeO_x NWs are observed by X-ray photoelectron spectroscopy. Broad photoluminescence spectra from 10 to 300 K are observed because of defects in the Ge/GeO_x NWs, which are also useful for nanoscale resistive switching memory. The resistive switching mechanism in an IrO_x/GeO_x/W structure involves migration of oxygen ions under external bias, which is also confirmed by real-time observation of the surface of the device. The porous IrO_x top electrode readily allows the evolved O₂ gas to escape from the device. The annealed device has a low operating voltage (<4 V), low RESET current (approximately 22 μA), large resistance ratio (>10³), long pulse read endurance of >10⁵ cycles, and good data retention of >10⁴ s. Its performance is better than that of the as-deposited device because the GeO_x film in the annealed device contains more oxygen vacancies. Under SET operation, Ge/GeO_x nanofilaments (or NWs) form in the GeO_x film. The diameter of the conducting nanofilament is approximately 40 nm, which is calculated using a new method.     

Enhanced resistive switching phenomena using low-positive-voltage format and self-compliance IrOx/GdOx/W cross-point memories

Enhanced resistive switching phenomena of IrO_x/GdO_x/W cross-point memory devices have been observed as compared to the via-hole devices. The as-deposited Gd₂O₃ films with a thickness of approximately 15 nm show polycrystalline that is observed using high-resolution transmission electron microscope. Via-hole memory device shows bipolar resistive switching phenomena with a large formation voltage of -6.4 V and high operation current of >1 mA, while the cross-point memory device shows also bipolar resistive switching with low-voltage format of +2 V and self-compliance operation current of <300 μA. Switching mechanism is based on the formation and rupture of conducting filament at the IrO_x/GdO_x interface, owing to oxygen ion migration. The oxygen-rich GdO_x layer formation at the IrO_x/GdO_x interface will also help control the resistive switching characteristics. This cross-point memory device has also Repeatable 100 DC switching cycles, narrow distribution of LRS/HRS, excellent pulse endurance of >10,000 in every cycle, and good data retention of >10⁴ s. This memory device has great potential for future nanoscale high-density non-volatile memory applications.     

Observation of Resistive Switching Memory by Reducing Device Size in a New Cr/CrO x /TiO x /TiN Structure

Nano-Micro Letters - The resistive switching memory characteristics of 100 randomly measured devices were observed by reducing device size in a Cr/CrO x /TiO x /TiN structure for the first time....     

Ge outdiffusion effect on flicker noise in strained-Si nMOSFETs

The flicker noise characteristics of strained-Si nMOSFETs are significantly dependent on the gate oxide formation. At high temperature (900/spl deg/C) thermal oxidation, the Si interstitials at the Si/oxide interface were injected into the underneath Si-SiGe heterojunction, and enhanced the Ge outdiffusion into the Si/oxide interface. The Ge atoms at Si/oxide interface act as trap centers, and the strained-Si nMOSFET with thermal gate oxide yields a much larger flicker noise than the control Si device. The Ge outdiffusion is suppressed for the device with the low temperature (700/spl deg/C) tetraethylorthosilicate gate oxide. The capacitance-voltage measurements of the strained-Si devices with thermal oxide also show that the Si/oxide interface trap density increases and the Si-SiGe heterojunction is smeared out due to the Ge outdiffusion.