Design of CMOS checkers with improved testability of bridging and transistor stuck-on faults

This work presents a design technique for CMOS static and dynamic checkers (to be used in self-checking circuits), that allows the detection of all internal single transistor stuck-on and bridging faults causing unacceptable degradations of the circuit dynamic performance (but not logical errors). Such a technique exploits simple voltage detector circuits to make sure that the intermediate faulty voltages inevitably produced by the faults of interest are always propagated at the checker output as logic errors.With the use of our technique, the main disadvantages of static checkers, so far preventing their use in practical applications, are overcome.The method has been applied to the particular case of two-rail (static as well as dynamic) checkers and its validity has been verified by means of electrical level simulations.     

Chemical and thermomechanical tailoring of the shape memory effect in poly(ε-caprolactone)-based systems

The thermally activated shape memory response of polymeric materials results from a combination of the material molecular architecture with the thermal/deformational history, or ‘programming’. In this work, we investigate the shape memory response of systems based on poly(ε-caprolactone) (PCL) so as to explore the adoption of proper chemical and thermomechanical tailoring routes. Cross-linked semicrystalline PCL-based materials are prepared by different molecular architectures starting from linear, three- and four-arms star PCL functionalized with methacrylate end groups, allowing to tune the melting temperature, T _m, ranging between 36 and 55 °C. The materials’ ability to display the shape memory is investigated by the application of proper thermomechanical cycles on specimens deformed at two different temperatures (23 and 65 °C, i.e. below and above the T _m, respectively). The shape memory response is studied under dynamic thermal conditions in thermally activated recovery tests, to identify the typical transformation temperatures, and under isothermal conditions at given recovery temperatures, to monitor shape recovery as a function of time. All the specimens are capable of full recovery on specific thermal ranges influenced by both melting and deformation temperatures. Specimens deformed above T _m are able to recover the whole deformation in a very narrow temperature region close to T _m, while those deformed at room temperature display broader recovery processes, those onset at about 30 °C. Isothermal tests reveal that when the deformed material is subjected to a constant recovery temperature, the amount of recovered strain and the time required strongly depend on the particular combination of melting temperature, deformation temperature and recovery temperature.     

Synthesis and characterization of mixed sodium and lithium fullerides for hydrogen storage

We herein report on the synthesis of mixed alkali cluster intercalated fullerides Na_xLi_y?xC₆₀ (y = 12; x = 1–6) by a two-steps mechanochemical reaction of fullerene with sodium and lithium. These compounds crystallize in the cubic lattice of C₆₀ displaying a contracted lattice parameter with respect to the Na₆C₆₀ parent structure. The analysis of the hydrogen sorption behaviour shows a slight decrease in the dehydrogenation enthalpy for y = 12 with respect to the sodium free member. Raman spectroscopy highlighted a partial electron transfer from alkali metals to C₆₀, suggesting the presence of charged sodium/lithium clusters. Finally, we applied muon spectroscopy to understand the different hydrogenation mechanisms in Na_xLi_6?xC₆₀ and Na_xLi_12?xC₆₀ and explain their different performance.     

Nonlinear dynamic behavior of rubber compounds: Construction of dynamic moduli generalized master curves

The nonlinear dynamic behavior of a vulcanized rubber compound employed in the production of tires was investigated. The values of the dynamic storage modulus, E', and the loss factor, tanδ, were measured at different frequencies, temperatures and strain amplitudes. Data were subsequently analyzed and treated by an empirical method of frequency‐temperature‐deformation reduction that provided for E' and tanδ, respectively, a single master curve and the frequency‐temperature and frequency‐deformation shift factors. The E' trend, extrapolated at higher strain amplitudes on the basis of the master curves, resulted in good agreement with E' values obtained from direct experimental measurements.     

Automatic Window Repositioning Technique for Digital Window Comparator Used Within Mixed-Signal Design-for Testability Schemes

The construction of digital window comparators for the on-chip evaluation of analogue signals within the mixed-signal integrated circuit is reviewed. One of the difficulties in their application is due to the lot-to-lot variation of the comparator window. A technique that allows the automatic window repositioning is described by which the window shift can be compensated. For this automatic compensation a so-called reference comparator is required. From the reference comparator the control signal are derived to select the actual configuration of the used evaluation comparators. It is shown, that this technique allows the automatic lot condition adjustment of the evaluation comparators by repositioning the windows of those comparators. As a synergy effect this technique provides lot specific information for an automated test equipment that can be documented in the test results for further diagnosis and traceability capabilities.Daniela De Venuto received the master degree in 1989 in Electronic Engineering at the Politecnico di Bari, Italy. In 1992 she obtained the Ph.D. degree for a thesis entitled: Fault diagnosis in digital integrated circuits by pulsed electron beam. In 1994 Dr. De Venuto took a post-doctoral position at the Politecnico di Bari. She became assistant professor in 1995 at the University of Lecce, Italy. Currently she is professor of Electronics at the Politecnico di Bari, Italy, teaching courses in Automatic Design of Integrated Circuits and Systems and Analog Electronics.In 2000 she was on sabbatical leave at the Laboratoire dElectronique Generale at the EPFL in Lausanne, Switzerland. During this stay she worked in the area of Hall sensor interface design in SOI technology. Actually she is visiting lecturer at the Centre for Microsystems Engineering, University of Lancaster, UK, where she started a collaboration on the design and test and design for testability of delta sigma converter. Since 2003 she is also Visiting Scholar at the University of Washington (Seattle). She is member of National Institute of Nuclear Physics (INFN) and she is also involved in CERN (Geneva, Switzerland) project, for test of radiation hardened analogue front-ends of pixel-detector. She is IEEE member and also member of the Editorial Board of Microelctronics Journal. Her research interests include the design and test of analogue ICs, design for testability for analogue and mixed-signal circuits as well as silicon solid-state detector design and characterisation.Michael J. Ohletz graduated in high frequency electrical engineering at the Fachhochschule Osnabrück, Germany, in 1977 and at the University of Hannover, Germany, in 1982. From 1982–1983 he was working at the cooperate research and development centre of Siemens AG in Munich, Germany. Between 1983– 1989 he was research assistant at the Institute for Electrodynamics at the University of Hannover where he received the Dr.-Ing. degree (PhD) for a thesis about the Hybrid Built-In Self-Test (HBIST) for mixed-signal ICs. Since 1989 Dr. Ohletz was project manager at the Information Technology Lab, and head of the analogue and mixed-signal design&test group. In 1998 he joined the R&D staff of Alcatel Microelectronics in Brussels, Belgium, as project and design methodology leader for high-voltage, mixed-signal ASICs for industrial and automotive applications. Between 2000 and 2002 he was program manager for automotive products. Currently Dr. Ohletz is manager for the whole program management of all mixed-signal ASIC products in Europe including automotive, industrial and computer/ consumer ASIC products at AMI Semiconductor in Vilvoorde, Belgium. His research interests include design, test and design methodology of high-voltage integrated mixed-signal circuits. In particular his interest is on automotive sensor applications. Beside this Dr. Ohletz serves as a reviewer for various international journals, conferences and workshops. He also is a peer referee for different national research councils in Europe and North America as well as for the Commission of the European Union.Bruno Riccò was born in Parma (Italy) on February 8, 1947. In 1971 he graduated in electrical engineering at the University of Bologna (Italy) and in 1975 received a Ph.D. from the University of Cambridge (U.K.) where he worked at the Cavendish Laboratory. In 1980 he became Full Professor of Applied Electronics at the University of Padua (Italy) and in 1983 he joined the University of Bologna (Italy). Since 1978 he has been holding courses on Electron Devices, Digital Integrated Electronics, Semiconductor Technology, IC Reliability and Testing. He has been Visiting Professor at the University of Stanford, at the IBM Thomas J. Watson Research Center (Yorktown Heights) and at the University of Washington. From 1986 to 1996 he has been European Editor of the IEEE Transaction on Electron Devices. Nominated Senior Member of the IEEE in 1991, 1n 1995 he received the G. Marconi Award by the Italian Association of Electrical and Electronics Engineers (AEI), for his research in electronics. In 1996 he became President of the Group of Electron Devices, Technologies and Circuits of AEI and in 1998 became President of the Italian Group of Electronics Engineers. In 1999 he was appointed European representative for the International Electron Device Meeting (IEDM). In 2000 he has become Vice-President of the North Italy Section of IEEE. In 1999 he has founded the first university spin-off in Italy working in the field of advanced digital systems. Prof. Ricco has been consulting for major semiconductor companies and for the Commission of the European Union in the definition, evaluation and review of research projects in microelectronics. Form a scientific point of view, Prof. Ricco has worked in the field of solid-state devices and ICs. In particular, he has made many contributions to the understanding and modeling of electron transport, tunneling in thin insulating films, silicon dioxide physics, MOSFETs physics, latch-up in CMOS structures, device modeling and simulation. He is currently working also in the field of IC design, evaluation and testing. Prof. Ricco is (co-) author of over 270 publications, more than half of which have published on major international Journals, of three books and of 6 patents in the field of Non-Volatile memories.     

Fault simulation for general FCMOS ICs

This work presents a technique to correctly deal with non-stuck-at faults in FCMOS circuits making use of complex macrogates. This method can be applied to any gate-level fault simulator providing, for each line of the circuit, the observability status that is directly related to that of individual devices in the actual macrogate implementation. Conductance conflicts are correctly solved to detect bridgings and transistors stuck-on. Fault coverage results are presented and discussed for two typical FCMOS circuits. Results obtained on all ISCAS benchmarks show that the time required for the fault simulation of CMOS faults is comparable to that of stuck-ats.     

Comments on “Thermal stresses in rubber-modified glassy polymers”

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