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1.
This paper demonstrates a 16-element phased-array transmitter in a standard 0.18-mum SiGe BiCMOS technology for Q-band satellite applications. The transmitter array is based on the all-RF architecture with 4-bit RF phase shifters and a corporate-feed network. A 1:2 active divider and two 1:8 passive tee-junction dividers constitute the corporate-feed network, and three-dimensional shielded transmission-lines are used for the passive divider to minimize area. All signals are processed differentially inside the chip except for the input and output interfaces. The phased-array transmitter results in a 12.5 dB of average power gain per channel at 42.5 GHz with a 3-dB gain bandwidth of 39.9-45.6 GHz. The RMS gain variation is < 1.3 dB and the RMS phase variation is < for all 4-bit phase states at 35-50 GHz. The measured input and output return losses are < -10 dB at 36.6-50 GHz, and <-10 dB at 37.6-50 GHz, respectively. The measured peak-to-peak group delay variation is plusmn 20 ps at 40-45 GHz. The output P-1dB is -5plusmn1.5 dBm and the maximum saturated output power is - 2.5plusmn1.5 dBm per channel at 42.5 GHz. The transmitter shows <1.8 dB of RMS gain mismatch and < 7deg of RMS phase mismatch between the 16 different channels over all phase states. A - 30 dB worst-case port-to-port coupling is measured between adjacent channels at 30-50 GHz, and the measured RMS gain and phase disturbances due to the inter-channel coupling are < 0.15 dB and < 1deg, respectively, at 35-50 GHz. All measurements are obtained without any on-chip calibration. The chip consumes 720 mA from a 5 V supply voltage and the chip size is 2.6times3.2 mm2.  相似文献   
2.
3.
Research problems in clothing simulation   总被引:1,自引:0,他引:1  
Clothing simulation and animation are of great importance in computer animation. If cloth simulations could be improved to the point that they could generate realistic cloth motion in real-time, they would find uses in many aspects of daily life such as in fashion design and manufacturing. The area of cloth simulation and animation is full of technical challenges: creating more realistic results, achieving faster run-times, and developing methods capable of constructing and simulating more complex garments. This paper provides an overview of the key procedures involved in the creation of clothed characters, describes the current state-of-the-art techniques, and proposes the research problems that most require further study. Three technical aspects of cloth simulation are considered in this paper: garment construction, physically based simulation, and collision resolution.  相似文献   
4.
Two 4-bit active phase shifters integrated with all digital control circuitry in 0.13-mum RF CMOS technology are developed for X- and Ku-band (8-18 GHz) and K-band (18-26 GHz) phased arrays, respectively. The active digital phase shifters synthesize the required phase using a phase interpolation process by adding quadrature-phased input signals. The designs are based on a resonance-based quadrature all-pass filter for quadrature signaling with minimum loss and wide operation bandwidth. Both phase shifters can change phases with less than about 2 dB of RMS amplitude imbalance for all phase states through an associated DAC control. For the X- and Ku-band phase shifter, the RMS phase error is less than 10o over the entire 5-18 GHz range. The average insertion loss ranges from to at 5-20 GHz. The input for all 4-bit phase states is typically at -5.4 plusmn1.3 GHz in the X- and Ku-band phase shifter. The K-band phase shifter exhibits 6.5-13 of RMS phase error at 15-26 GHz. The average insertion loss is from 4.6 to at 15-26 GHz. The input of the K-band phase shifter is at 24 GHz. For both phase shifters, the core size excluding all the pads and the output 50 Omega matching circuits, inserted for measurement purpose only, is very small, 0.33times0.43 mm2 . The total current consumption is 5.8 mA in the X- and Ku-band phase shifter and 7.8 mA in the K-band phase shifter, from a 1.5 V supply voltage.  相似文献   
5.
Performance analysis and optimization of a circular pin-fin with inside gaps in a rectangular cooling channel were performed at Reynolds number, 10,000, using three-dimensional Reynolds-averaged Navier–Stokes equations and a multi-objective genetic algorithm. The low-Reynolds-number version of the shear stress transport model was used as turbulence closure. A parametric study was also performed to identify the geometrical effects of the pin-fin on heat transfer and pressure drop. The straight and reference gapped pin-fins yielded better performances than those of the circular pin-fin without the gap in terms of both heat transfer and pressure drop. The objective of the optimization was to maximize the heat transfer and minimize the pressure loss, simultaneously. The area-averaged Nusselt number and pressure loss coefficient were considered as objective functions, and three design variables related to the geometry of the gapped pin-fin were chosen for the optimization. Twenty-seven design points were generated using Latin hypercube sampling in the design space, and response surface approximation models were constructed for the objective functions. The optimization results were analyzed using five representative solutions on the Pareto-optimal front. The objective functions were found to be significantly affected by variation in the design variables, especially, the width of front gap and the rear gap angle.  相似文献   
6.
This paper demonstrates an 8-element phased array receiver in a standard 0.18-mum SiGe BiCMOS (1P6M, SiGe HBT ft ap 150 GHz) technology for X- and Ku-band applications. The array receiver adopts the All-RF architecture, where the phase shifting and power combining are done at the RF level. With the integrations of all the digital control circuitry and ESD protection for all I/O pads, the receiver consumes a current of 100 ~ 200 m A from a 3.3 V supply voltage. The receiver shows 1.5 ~ 24.5 dB of power gain per channel from a 50 Omega load at 12 GHz with bias current control, and an associated NF of 4.2 dB (@ max. gain) to 13.2 dB (@ min. gain). The RMS gain error is < 0.9 dB and the RMS phase error is < 6deg at 6-18 GHz for all 4-bit phase states. The measured group delay is 162.5 plusmn 12.5 ps for all phase states at 6-18 GHz. The RMS phase mismatch and RMS gain mismatch among the eight channels are < 2.7deg and 0.4 dB, respectively, for all 16 phase states, over 6-18 GHz. The 8-element array can operate instantaneously at any center frequency and with a wide bandwidth (3 to 6 GHz, depending on the center frequency) given primarily by the 3 dB gain variation in the 6-18 GHz range. To our knowledge, this is the first demonstration of an All-RF phased array on a silicon chip with very low RMS phase and gain errors at 6-18 GHz. The chip size is 2.2 times 2.45 mm2 including all pads.  相似文献   
7.

The effects of combinations of dissimilar aluminum alloys during Friction stir welding (FSW) on the process response and resultant joint properties are experimentally investigated using two dissimilar automotive structural aluminum alloys. Depending on the materials on the advancing and retreating sides of the tool travel direction during FSW, four different material combinations are considered. FSW joints without macroscopic defects are successfully fabricated for the four different material combinations. The optical microscopy results show that the macroscopic material mixing behaviors of the two dissimilar material combinations during FSW are somewhat different from each other, even though the process responses during joining are not much different. The results of the quasi-static tensile tests and EBSD analysis demonstrate that the mechanical behaviors and orientation changes of the joint during tensile deformation are affected by the material locations with respect to the tool travel direction during FSW.

  相似文献   
8.
Volatile compounds of 7 commercial fermentation starters, including 4 traditional nuruk, 2 ipguk, and 1 crude amylolytic enzyme, were extracted using solvent-assisted flavor evaporation (SAFE), and extracts were analyzed using GC-MS. A total of 70 volatile compounds, including 4 esters, 10 acids, 16 alcohols, 16 hydrocarbons, 9 ketones, 5 aldehydes, 3 volatiles phenols, and 7 miscellaneous components were identified. Concentrations of volatile compounds, including 4,6-dimethylundecane, methyl 2-hydroxybenzoate, 1-hexanol, 2-phenylethanol, 3-methylbutanoic acid, and hexanoic acid were higher in 4 traditional nuruk starters than in others. The major volatile components in 2 ipguk starters were the hydrocarbones dodecane, heptadecane, octadecane, and nonadecane. Concentrations of 2-methoxy-4-vinylphenol and 3-hydroxy-2-butanone were highest in the crude amylolytic enzyme starter. Compositions and amounts of volatile compounds were different among the 7 commercial fermentation starters.  相似文献   
9.
Indexing techniques have been developed for wireless data broadcast environments, in order to conserve the scarce power resources of the mobile clients. However, the use of interleaved index segments in a broadcast cycle increases the average access latency for the clients. In this paper, the broadcast-based spatial query processing methods (BBS) are presented for the location-based services. In the BBS, broadcasted data objects are sorted sequentially based on their locations, and the server broadcasts the location dependent data along with an index segment. Then, a sequential prefetching and caching scheme is designed to reduce the query response time. The performance of this scheme is investigated in relation to various environmental variables, such as the distributions of the data objects, the average speed of the clients and the size of the service area.  相似文献   
10.
A 1.2-V 72-Mb double data rate 3 (DDR3) SRAM achieves a data rate of 1.5 Gb/s using dynamic self-resetting circuits. Single-ended main data lines halve the data line precharging power dissipation and the number of data lines. Clocks phase shifted by 0/spl deg/, 90/spl deg/, and 270/spl deg/ are generated through the proposed clock adjustment circuits. The latter circuits make input data sampled with an optimized setup/hold window. On-chip input termination with a linearity error of /spl plusmn/4.1% is developed to improve signal integrity at higher data rates. A 1.2-V 1.5-Gb/s 72-Mb DDR3 SRAM is fabricated in a 0.10-/spl mu/m CMOS process with five metals. The cell size and the chip size are 0.845 /spl mu/m/sup 2/ and 151.1 mm/sup 2/, respectively.  相似文献   
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