Parallel BIST architecture for CAMs

A new parallel test algorithm and a built-in self test (BIST) architecture for efficient testing of various types of functional faults in content addressable memories (CAMs) are developed. The results show that efficient and practical testing with very low complexity and area overhead can be achieved     

Rare-earth-enabled universal solders for microelectromechanical systems and optical packaging

In packaging of microelectromechanical systems (MEMS), optical, and electronic devices, there is a need to directly bond a wide variety of inorganic materials, such as oxides, nitrides, and semiconductors. Such applications involve hermetic-sealing components, three-dimensional MEMS assembly components as well as active semiconductor or optical components, dielectric layers, diffusion barriers, waveguides, and heat sinks. These materials are known to be very difficult to wet and bond with low melting-point solders. New Sn-Ag- or Au-Sn-based universal solders doped with a small amount of rare-earth (RE) elements have been developed, which now allow direct and powerful bonding onto the surfaces of various MEMS, optical, or electronic device materials. The microstructure, interface properties, and mechanical behavior of the bonds as well as the potential packaging applications of these new solder materials for MEMS and optical fiber devices are described. Various packaging-related structural, thermal, or electrical issues in MEMS are also discussed.     

An efficient IP address lookup algorithm based on a small balanced tree using entry reduction

Due to a tremendous increase in internet traffic, backbone routers must have the capability to forward massive incoming packets at several gigabits per second. IP address lookup is one of the most challenging tasks for high-speed packet forwarding. Some high-end routers have been implemented with hardware parallelism using ternary content addressable memory (TCAM). However, TCAM is much more expensive in terms of circuit complexity as well as power consumption. Therefore, efficient algorithmic solutions are essentially required to be implemented using network processors as low cost solutions.Among the state-of-the-art algorithms for IP address lookup, a binary search based on a balanced tree is effective in providing a low-cost solution. In order to construct a balanced search tree, the prefixes with the nesting relationship should be converted into completely disjointed prefixes. A leaf-pushing technique is very useful to eliminate the nesting relationship among prefixes [V. Srinivasan, G. Varghese, Fast address lookups using controlled prefix expansion, ACM Transactions on Computer Systems 17 (1) (1999) 1-40]. However, it creates duplicate prefixes, thus expanding the search tree.This paper proposes an efficient IP address lookup algorithm based on a small balanced tree using entry reduction. The leaf-pushing technique is used for creating the completely disjointed entries. In the leaf-pushed prefixes, there are numerous pairs of adjacent prefixes with similarities in prefix strings and output ports. The number of entries can be significantly reduced by the use of a new entry reduction method which merges pairs with these similar prefixes. After sorting the reduced disjointed entries, a small balanced tree is constructed with a very small node size. Based on this small balanced tree, a native binary search can be effectively used in address lookup issue. In addition, we propose a new multi-way search algorithm to improve a binary search for IPv4 address lookup. As a result, the proposed algorithms offer excellent lookup performance along with reduced memory requirements. Besides, these provide good scalability for large amounts of routing data and for the address migration toward IPv6. Using both various IPv4 and IPv6 routing data, the performance evaluation results demonstrate that the proposed algorithms have better performance in terms of lookup speed, memory requirement and scalability for the growth of entries and IPv6, as compared with other algorithms based on a binary search.     

Senescence Marker Protein 30 (SMP30): A Novel Pan-Species Diagnostic Marker for the Histopathological Diagnosis of Breast Cancer in Humans and Animals

Senescence marker protein 30 (SMP30) is a cell survival factor playing an important role in vitamin C synthesis and antiapoptosis. Moreover, its cytoprotective role suggests a possibility to be related to cancer cell survival. Mammary carcinoma is a common cancer in both humans and animals. Because of its histopathological diversity, especially in the early stage, histopathological diagnosis may be complicated; therefore, a diagnostic marker is helpful for confirmation. The present study analyzed the expression pattern of SMP30 in mammary carcinoma in humans, dogs, and cats. Immunohistochemistry, immunofluorescence, and western blot analysis were used to investigate SMP30 expression patterns. The expression was specifically observed in neoplastic glandular epithelial cells. The expression increased with the malignancy of glandular epithelial cells with a highly proliferative status. However, SMP30 expression was low in normal mammary gland tissues or well-differentiated adenoma tissues. The patterns were consistently reproduced in canine primary mammary carcinoma cells and MCF-7 and MDA-MB-231 human carcinoma cell lines. This study provides useful information to understand SMP30 expression in various stages of mammary carcinoma and to suggest its utility as a pan-species diagnostic marker, thereby helping to establish strategies for diagnosing mammary carcinoma in several species.     

Two computational regimes of a single-compartment neuron separated by a planar boundary in conductance space

Recent in vitro data show that neurons respond to input variance with varying sensitivities. Here we demonstrate that Hodgkin-Huxley (HH) neurons can operate in two computational regimes: one that is more sensitive to input variance (differentiating) and one that is less sensitive (integrating). A boundary plane in the 3D conductance space separates these two regimes. For a reduced HH model, this plane can be derived analytically from the V nullcline, thus suggesting a means of relating biophysical parameters to neural computation by analyzing the neuron's dynamical system.     

GaP/GaNP Heterojunctions for Efficient Solar‐Driven Water Oxidation

The growth and characterization of an n‐GaP/i‐GaNP/p⁺‐GaP thin film heterojunction synthesized using a gas‐source molecular beam epitaxy (MBE) method, and its application for efficient solar‐driven water oxidation is reported. The TiO₂/Ni passivated n‐GaP/i‐GaNP/p⁺‐GaP thin film heterojunction provides much higher photoanodic performance in 1 m KOH solution than the TiO₂/Ni‐coated n‐GaP substrate, leading to much lower onset potential and much higher photocurrent. There is a significant photoanodic potential shift of 764 mV at a photocurrent of 0.34 mA cm^?2, leading to an onset potential of ≈0.4 V versus reversible hydrogen electrode (RHE) at 0.34 mA cm^?2 for the heterojunction. The photocurrent at the water oxidation potential (1.23 V vs RHE) is 1.46 and 7.26 mA cm^?2 for the coated n‐GaP and n‐GaP/i‐GaNP/p⁺‐GaP photoanodes, respectively. The passivated heterojunction offers a maximum applied bias photon‐to‐current efficiency (ABPE) of 1.9% while the ABPE of the coated n‐GaP sample is almost zero. Furthermore, the coated n‐GaP/i‐GaNP/p⁺‐GaP heterojunction photoanode provides a broad absorption spectrum up to ≈620 nm with incident photon‐to‐current efficiencies (IPCEs) of over 40% from ≈400 to ≈560 nm. The high low‐bias performance and broad absorption of the wide‐bandgap GaP/GaNP heterojunctions render them as a promising photoanode material for tandem photoelectrochemical (PEC) cells to carry out overall solar water splitting.     

Modified harmony search optimization for constrained design problems

Constrained optimization is a major real-world problem. Constrained optimization problems consist of an objective function subjected to both linear and nonlinear constraints. Here a constraint handling procedure based on the fitness priority-based ranking method (FPBRM) is proposed. It is embedded into a harmony search (HS) algorithm that allows it to satisfy constraints. The HS algorithm is conceptualized using the musical process of searching for a perfect state of harmony. Here, the original heuristic HS was improved by combining both improved and global-best methods along with the FPBRM. The resulting modified harmony search (MHS) was then compared with the original HS technique and other optimization methods for several test problems.     

Current work and future trends for sustainable buildings in South Korea

Korea, selected as a target nation of the second commitment period for the reduction of greenhouse gases by 2013, is making efforts to reduce the production of greenhouse gases in all industrial fields. In particular, Korea is working hard to prepare for measures on the national level to reduce energy consumption and to limit the creation of carbon dioxide in the construction industry, which is responsible for over 40% of all carbon dioxide production. In order to pursue sustainability in the construction industry, existing development-focused construction activities must be transformed via a new paradigm focusing on sustainable development through the adoption of sustainable policies by the government and the development and dissemination of sustainable construction technologies.For such reasons, this study examined sustainable policies, research, and education recently used in Korea to identify future trends in the sustainable construction industry toward which Korea should strive in terms of governmental policy, research, education, and projects.     

Data Randomization Scheme for Endurance Enhancement and Interference Mitigation of Multilevel Flash Memory Devices

In this letter, we propose a data randomization scheme for endurance and interference mitigation of deeply‐scaled multilevel flash memory. We address the relationships between data patterns and the raw bit error rate. An on‐chip pseudorandom generator composed of an address‐based seed location decoder is developed and evaluated with respect to uniformity. Experiments performed with 2x‐nm and 4x‐nm NAND flash memory devices illustrate the effectiveness of our scheme. The results show that the error rate is reduced up to 86% compared to that of a conventional cycling scheme. Accordingly, the endurance phenomenon can be mitigated through analysis of interference that causes tech shrinkage.