Switched-current delta-sigma A/D converters

Switched-current oversampling A/D converters are the ideal choice for mixed analog/digital design due to their complete compatibility with digital CMOS process and high tolerance to process variation. This paper presents a tutorial discussion on all the aspects of switched-current oversampling A/D converters, including structures, circuits, and practical issues. Three different modulator structures and six different types of switched-current circuits were used with an emphasis on low-voltage operation. Eight 3.3-V oversampling A/D converters were implemented and measured, and another one 1.2-V oversampling A/D converter was also implemented but yet to be measured.     

A low-voltage switched-current delta-sigma modulator

This paper presents the design of a fully differential switched-current delta-sigma modulator using a single 3.3-V power-supply voltage. At system level, we tailor the modulator structure considering the similarity and difference of switched-capacitor and switched-current realizations. At circuit level, we propose a new switched-current memory cell and integrator with improved common mode feedback, without which low power-supply-voltage operation would not be possible. The whole modulator was implemented in a 0.8-μm double-metal digital CMOS process. It occupies an active area of 0.53×0.48 mm² and consumes a current of 0.6 mA from a single 3.3-V power supply. The measured dynamic range is over 10 b     

关于物料在前置分级装置筛面上运动轨迹的研究

本文用计算机数值解法解决了物料在旋振筛筛面上的运动轨迹的理论分析问题,并对一些现行的观点提出了新的见解。     

高速小振幅旋振机械的力学及数学模型

本文建立了高速小振幅旋振机械的力学模型和数学模型,并通过大量实验加以验证。     

一种用于谐波测量的全数字同步采样算法

提出了一种用于高精度谐波测量的全数字同步采样算法,其原理是根据电网的基波频率动态地调整过采样模数转换器（ADC）中抽取电路的抽取率,使得抽取后的系统采样频率可以跟随基波频率的变化而变化。与传统的模拟锁相环（PLL）和软件同步采样算法相比,该算法完全由数字电路实现,更加节省硬件面积,适合于数模混合系统的应用开发。文中给出了一个包含delta-sigma ADC、频率测量模块、抽取率控制单元和64点快速傅里叶变换（FFT）计算引擎的、用于实际混合系统芯片设计的Simulink仿真模型。对于采样频率是1.638 4 MHz、带宽是1.6 kHz（可计量31次谐波）的谐波测量系统,在电网频率波动±5%的条件下,同步采样后基波和谐波有效值误差分别小于0.001%和0.02%。     

Switched-current oversampling converters

There are many choices in designing a real-time signal processing system. To exploit the advantages that inexpensive digital CMOS process technologies provide, it is usually a good choice to use digital signal processing circuits extensively and to use analog circuits only as a bridge between the real analog world and digital signal processing circuits. The mixed analog/digital circuits usually have high performance and low cost. SI oversampling converters in particular are the ideal choice as the front ends for the mixed analog/digital design. They serve to bridge the real world and modern process technologies     

英国低造价、适应性、低碳排放住宅建设计划

分析了英国政府主导的"为住房建造而设计"(Design for Manufacture)计划产生的社会经济背景,追踪其实施过程和成果,总结计划实施取得的经验,通过案例分析归纳降低建设成本、提高适应性、节能减排等方面的技术措施,为我国住房政策和住宅建设.住宅设计提供参考.     

高速旋振机械力学及数学模型的分析

本文对高速旋振机械的力学及数学模型进行了较系统、较全面的分析、探讨了各种特殊情况下的型态，并用图加以直观解释。     

普罗旺斯的罗马古城——奥朗日

普罗旺斯的奥朗日市(Orange)位于沃克吕兹省,是一座古朴小巧、精致迷人的阳光之城,街道、广场、民居处处展现出中世纪的遗风,它拥有列入世界遗产名录的古罗马遗迹,记录着古罗马灿烂的历史。古老的奥朗日市历经数千年风风雨雨,今天仍然充满活力、焕发光彩,令人流连忘返。城市历史与文化传承奥朗日的历史源远流长,城南的圣欧特罗普山(the Colline St Eturope)有新石器时代的遗迹。在公元前2世纪～公元前1世纪凯尔特人-利古里亚人时期,卡瓦里(Cavare)联邦征服了这里,并在圣欧特罗普山建立首都(当时称为Aurosia),俯瞰奥朗日,控制罗讷河富饶的…     

Clock-Feedthrough Compensated First-Generation SI Circuits and Systems

In this paper we discuss the clock-feedthrough problemin switched-current circuits. We present a clock-feedthroughcompensated first-generation SI memory cell that ideally cancelsboth constant and signal-dependent clock-feedthrough. It is shownhow to optimize the memory cell performance according to a generalcost function. Measured total harmonic distortion of the memorycell is less than -65 dB when optimized for low-power. The implementationof a second-order delta-sigma modulator using the presented memorycell is also described. Measurements confirmed a dynamic rangeof 11 bits. All circuits were implemented in a single-poly CMOSprocess.