EC Analysis of Multi-Antenna System over 5G and Beyond Networks and its Application to IRS-Assisted Wireless Systems

Wireless Personal Communications - Recently, the theory of effective rate has attracted much attention, since it can take the delay aspect into account when performing channel capacity analysis. In...     

Flexible,Mechanically Stable,Porous Self-Standing Microfiber Network Membranes of Covalent Organic Frameworks: Preparation Method and Characterization

Covalent organic frameworks (COFs) show advantageous characteristics, such as an ordered pore structure and a large surface area for gas storage and separation, energy storage, catalysis, and molecular separation. However, COFs usually exist as difficult-to-process powders, and preparing continuous, robust, flexible, foldable, and rollable COF membranes is still a challenge. Herein, such COF membranes with fiber morphology for the first time prepared via a newly introduced template-assisted framework process are reported. This method uses electrospun porous polymer membranes as a sacrificial large dimension template for making self-standing COF membranes. The porous COF fiber membranes, besides having high crystallinity, also show a large surface area (1153 m² g⁻¹), good mechanical stability, excellent thermal stability, and flexibility. This study opens up the possibility of preparation of large dimension COF membranes and their derivatives in a simple way and hence shows promise in technical applications in separation, catalysis, and energy in the future.     

Microbial susceptibility of various polymers and evaluation of thermoplastic elastomers with antimicrobial additives

The incursion of microbial growth on polymeric products can deteriorate their performance and lead to the development of undesirable staining and odors. A growing trend in the industry has aimed to reduce microbial populations on high-touch surfaces via the use of antimicrobials to protect material aesthetics and durability or to prevent the spread of pathogenic microorganisms. In this study, a variety of plastic substrates (30 unique polymer compounds), including poly(acrylonitrile-co-butadiene-co-styrene), poly(butylene terephthalate), poly(etherimide), various thermoplastic elastomers (TPEs), poly(carbonates), and poly(amides), were screened for susceptibility to microbial attack using American Society for Testing and Materials (ASTM) G21 (fungi susceptibility), Japanese Industrial Standard (JIS) Z2801, and modified ASTM E1428-15a (bacterial susceptibility) test standards. TPEs were determined to be most susceptible to microbial attack under the appropriate environmental conditions. Subsequent studies assessed the use of an antimicrobial additive, zinc pyrithione (ZPT), for potential efficacy in a variety of TPE blends for diverse target market applications. ZPT proved to be very effective in protecting TPEs, reducing Staphylococcus aureus and Escherichia coli populations by 99.9% or more in JIS Z2801 testing and inhibiting fungal growth (rating = 0) according to the ASTM G21 standard.     

Domain Adaptation for POS Tagging with Contrastive Monotonic Chunk-wise Attention

Neural Processing Letters - Part of Speech (POS) tagging is a sequential labelling task and one of the core applications of Natural Language Processing. It has been a challenging problem for the...     

Impact of Mole Fractions due to Work Function Variability (WFV) of Metal Gate on Electrical Parameters in Strained SOI-FinFET

In the recent sub-20 nm technology node, the process variability issues have become a major problem for scaling of MOS devices. We present a design for a strained Si/SiGe FinFET on an insulator using a 3D TCAD simulator. The impact of metal gate work function variability (WFV) on electrical parameters is studied. Such impact of WFV for different mole fractions (x) of the SiGe layer in a strained SOI-FinFET with varying grain size is presented. The results show that as the mole fraction is increased, the variability in threshold voltage (σVT) and off current (σIoff) is decreased; while, the variability of on-current (σIon) is increased. A notable observation is the distribution of electrical parameters approaches a normal distribution for smaller grain sizes.     

Surface effects in nanocrystalline silicon

Exposure to ammonia (NH₃) increases the dark current (DC) in nanocrystalline silicon. Light soaking (LS) for short periods also enhances the dark current, which remains at a high value for a long time. Pumping alone is unable to restore the initial annealed state, but annealing brings it back. The final state obtained by LS and NH₃ exposure depends on the order in which they are performed. Evaporated selenium (Se) deposited on nanocrystalline silicon decreases the DC. These effects cannot be explained entirely by the presence of a-Si : H alone, in our sample. DC and photoluminescence (PL) measurements indicate the presence of two types of center in our sample, which behave differently when exposed to NH₃.     

Static energy reduction techniques for microprocessor caches

Microprocessor performance has been improved by increasing the capacity of on-chip caches. However, the performance gain comes at the price of static energy consumption due to subthreshold leakage current in cache memory arrays. This paper compares three techniques for reducing static energy consumption in on-chip level-1 and level-2 caches. One technique employs low-leakage transistors in the memory cell. Another technique, power supply switching, can be used to turn off memory cells and discard their contents. A third alternative is dynamic threshold modulation, which places memory cells in a standby state that preserves cell contents. In our experiments, we explore the energy and performance tradeoffs of these techniques. We also investigate the sensitivity of microprocessor performance and energy consumption to additional cache latency caused by leakage-reduction techniques.     

Estimating and reducing the memory requirements of signal processing codes for embedded systems

Most embedded systems have limited amount of memory. In contrast, the memory requirements of the digital signal processing (DSP) and video processing codes (in nested loops, in particular) running on embedded systems is significant. This paper addresses the problem of estimating and reducing the amount of memory needed for transfers of data in embedded systems. First, the problem of estimating the region associated with a statement or the set of elements referenced by a statement during the execution of nested loops is analyzed. For a fixed execution ordering, a quantitative analysis of the number of elements referenced is presented; exact expressions for uniformly generated references and a close upper and lower bound for nonuniformly generated references are derived. Second, in addition to presenting an algorithm that computes the total memory required, this paper also discusses the effect of transformations (that change the execution ordering) on the lifetimes of array variables, i.e., the time between the first and last accesses to a given array location. The term maximum window size is introduced, and quantitative expressions are derived to compute the maximum window size. A detailed analysis of the effect of unimodular transformations on data locality, including the calculation of the maximum window size, is presented.