A smart process controller framework for Industry 4.0 settings

This paper presents a smart supervisory framework for a single process controller, designed for Industry 4.0 shop floors. This digitization of a full supervisory suite for a single process controller enables self-awareness, self-diagnosis, self-prognosis, and self-healing (by definition, these "self" elements are missing from other supervisory frameworks diagnosing numerous controllers in parallel). The proposed framework is aligned with the concept of a Cyber Physical System (CPS), since its implementation generates a rich cyber physical entity of the controlled process. This CPS entity can either be considered as the process digital twin, or can provide a solid basis for generating it. Finally, the framework includes the main characteristics of Industry 4.0, such as advanced use of Artificial Intelligence (AI) and big data analysis. The framework is based on four modules: (1) Control and Awareness module—performing both continuous process control and adjustments, as well as machine learning (ML) and statistical process control (SPC) for identifying abnormalities that require further diagnosis; (2) Process -diagnosis module—performing continual (recurrent) analysis of the process state and trends; (3) Prognosis and Healing module—performing prognosis and automated intervention via parameter changes, re-configurations, and automated maintenance; (4) External Interaction Platform—an interactive module for interfacing with experts, presenting them with the process analysis information and obtaining feedback from them as part of a learning process. Using an implementation showcase to illustrate the methodological framework’s applicability, we demonstrate its real-world potential. The proposed framework could serve as a guide for implementing smart process control and maintenance systems in Industry 4.0 shop floors. It could also provide a firm basis for comparison with future suggested frameworks. Future research directions could include pursuing improvements to the proposed process control framework and validating the framework by case studies of its implementation.

     

Cathepsin E expression by normal and premalignant cervical epithelium

We have investigated the expression of the aspartic proteinase cathepsin E and HLA-DR and the presence of HPV16 in normal squamous epithelium (n = 8) and low-grade (n = 21) and high-grade (n = 14) intraepithelial squamous lesions of the uterine cervix. Immunohistochemistry of cervical biopsies revealed that up-regulation of cathepsin E expression was related to increasing severity of the cervical intraepithelial neoplasia (CIN). Up-regulation of protein was associated with increased message as assessed by in situ hybridization. Langerhans cells and the majority of koilocytes did not express detectable cathepsin E levels. Although there was also an up-regulation of HLA-DR expression by cervical keratinocytes in cervical intraepithelial neoplasia lesions, as determined by immunohistochemistry, no significant correlation was found between HLA-DR and cathepsin E expression in these lesions; neither was expression of cathepsin E correlated to the presence of HPV16, detected by polymerase chain reaction. The expression of cathepsin E, an aspartic proteinase that is reported to play a role in antigen processing for presentation by class II major histocompatibility complex molecules, is associated with cellular dedifferentiation in cervical intraepithelial neoplasia.     

最快晶体管的频率接近太赫兹

Robert J.Mears是用于宽带互联网的铒掺杂光纤放大器(EDFA)的发明者。他在寻找将光器件和波导结合到硅中的方法时,发现了一个有趣的结果:一种特殊的硅超晶格结构可以加速某一个     

Modelling the effects of dam removal on migratory walleye (Sander vitreus) early life‐history stages

Many dams in the USA have outlived their intended purpose and an increasing number are being considered for removal. Yet, quantitative studies of the potential physical, biological and ecological responses are needed to assess dam removal decisions. In this paper, the responses of migratory walleye (Sander vitreus) to increased spawning habitat availability as a result of dam removal was studied by comparing scenarios with and without a high‐head dam in the Sandusky River (Ohio), a major tributary to Lake Erie. A conceptual, ecological model was proposed to define the relationship between hydrodynamics and walleye spawning, egg hatching, larval drift and survival. A mathematical, ecological model of the early life‐history stages was then developed and coupled with time series of depth and velocity predictions over the spawning grounds from a 1‐D hydrodynamic model. Model simulations were run for 1984–1993 for both the with‐ and without‐dam scenarios to assess the potential benefit of dam removal. The simulation results demonstrated that velocity, depth and water temperature are major factors influencing adult walleye spawning success. Without the dam, 10 times the amount of spawning habitat would be available for walleye to spawn. This increase in spawning habitat area resulted in up to five times the total egg deposition and seven times the larval output to the nursing grounds, based on the assumption that 5% of the walleye population of Lake Erie migrated up the Sandusky River to spawn. We concluded that the spawning habitat in the current condition (with the dam) is limiting and additional spawning habitat upstream could significantly increase the number of larval walleye drifting to Lake Erie. The model sensitivity analysis showed that the number of walleye migrating up the river in spring is the dominant factor for larval recruitment to the lake. Copyright © 2006 John Wiley & Sons, Ltd.     

Universal linear least squares prediction: upper and lower bounds

We consider the problem of sequential linear prediction of real-valued sequences under the square-error loss function. For this problem, a prediction algorithm has been demonstrated whose accumulated squared prediction error, for every bounded sequence, is asymptotically as small as the best fixed linear predictor for that sequence, taken from the class of all linear predictors of a given order p. The redundancy, or excess prediction error above that of the best predictor for that sequence, is upper-bounded by A/sup 2/P ln(n)/n, where n is the data length and the sequence is assumed to be bounded by some A. We provide an alternative proof of this result by connecting it with universal probability assignment. We then show that this predictor is optimal in a min-max sense, by deriving a corresponding lower bound, such that no sequential predictor can ever do better than a redundancy of A/sup 2/p ln(n)/n.     

Constructing inferences during narrative text comprehension.

Describes a constructionist theory that accounts for the knowledge-based inferences that are constructed when readers comprehend narrative text. Readers potentially generate a rich variety of inferences when they construct a referential situation model of what the text is about. The proposed constructionist theory specifies that some, but not all, of this information is constructed under most conditions of comprehension. The distinctive assumptions of the constructionist theory embrace a principle of search (or effort) after meaning. According to this principle, readers attempt to construct a meaning representation that addresses the reader's goals, that is coherent at both local and global levels, and that explains why actions, events, and states are mentioned in the text. This study reviews empirical evidence that addresses this theory and contrasts it with alternative theoretical frameworks. (PsycINFO Database Record (c) 2010 APA, all rights reserved)     

Investigating onset, cessation, relapse, and recovery: Why you should, and how you can, use discrete-time survival analysis to examine event occurrence.

Illustrates how discrete-time survival analysis can address questions about onset, cessation, relapse, and recovery. Using data on the onset of suicide ideation and depression and relapse into cocaine use, the authors introduce key concepts underpinning the method, describe the action of the discrete-time hazard model, and discuss several types of main effects and interactions that can be included as predictors. Practical issues of data analysis and strategies for interpretation and presentation are discussed. (PsycINFO Database Record (c) 2010 APA, all rights reserved)     

The application of loss-free resistors in power processing circuits

Applications of loss-free elements with resistive characteristics in power processing systems are discussed. The synthesis of this kind of element is based on the control of a two port which has a transformer or gyrator matrix. Both of the controlled two ports can be realized by means of switched mode circuits. The loss-free resistor can be applied to the stabilization of unstable systems, for damping oscillatory waveforms, and balancing of power flow in AC-DC conversion systems. This kind of element has been applied to the stabilization of a gas laser system. It replaced a conventional resistive element which was applied for this purpose     

Area-efficient high-throughput MAP decoder architectures

Iterative decoders such as turbo decoders have become integral components of modern broadband communication systems because of their ability to provide substantial coding gains. A key computational kernel in iterative decoders is the maximum a posteriori probability (MAP) decoder. The MAP decoder is recursive and complex, which makes high-speed implementations extremely difficult to realize. In this paper, we present block-interleaved pipelining (BIP) as a new high-throughput technique for MAP decoders. An area-efficient symbol-based BIP MAP decoder architecture is proposed by combining BIP with the well-known look-ahead computation. These architectures are compared with conventional parallel architectures in terms of speed-up, memory and logic complexity, and area. Compared to the parallel architecture, the BIP architecture provides the same speed-up with a reduction in logic complexity by a factor of M, where M is the level of parallelism. The symbol-based architecture provides a speed-up in the range from 1 to 2 with a logic complexity that grows exponentially with M and a state metric storage requirement that is reduced by a factor of M as compared to a parallel architecture. The symbol-based BIP architecture provides speed-up in the range M to 2M with an exponentially higher logic complexity and a reduced memory complexity compared to a parallel architecture. These high-throughput architectures are synthesized in a 2.5-V 0.25-/spl mu/m CMOS standard cell library and post-layout simulations are conducted. For turbo decoder applications, we find that the BIP architecture provides a throughput gain of 1.96 at the cost of 63% area overhead. For turbo equalizer applications, the symbol-based BIP architecture enables us to achieve a throughput gain of 1.79 with an area savings of 25%.