排序方式: 共有13条查询结果,搜索用时 15 毫秒
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首先分别利用直流电学法、脉冲电学法和微区拉曼光谱法测量了晶格匹配InAlN/GaN高电子迁移率晶体管(HEMT)的沟道温度,然后评估了各类评估方法的准确性。结果表明:直流电学法获得的温度值远低于拉曼光谱法,严重低估了HEMT工作时的沟道温度;脉冲电学法获得的温度值有所提升,但受限于水平空间分辨率,平均了源极-漏极之间的温度;微区拉曼光谱法能够准确获得沟道最高温度,但测量过程复杂,不适合评估封装器件。最后,提出了一种基于微光显微镜(EMMI)技术的微光电学法,获得了沟道温度的三角分布关系,得到了与拉曼光谱法一致的实验结果。该评估方法适合于实际生产。 相似文献
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The degradation of device under GIDL (gate-induced drain leakage current) stress has been studied using LDD NMOSFETs with 1.4 nm gate oxides. Experimental result shows that the degradation of device parameters depends more strongly on Vd than on Vg. The characteristics of the GIDL current are used to analyze the damage generated during the stress. It is clearly found that the change of GIDL current before and after stress can be divided into two stages. The trapping of holes in the oxide is dominant in the first stage, but that of electrons in the oxide is dominant in the second stage. It is due to the common effects of edge direct tunneling and band-to-band tunneling. SILC(stress induced leakage current)in the NMOSFET decreases with increasing stress time under GIDL stress. The degradation characteristic of SILC also shows saturating time dependence. SILC is strongly dependent on the measured gate voltage. The higher the measured gate voltage, the less serious the degradation of the gate current. A likely mechanism is presented to explain the origin of SILC during GIDL stress. 相似文献
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研究了90nm工艺条件下的轻掺杂漏(lightly-doped drain,LDD)nMOSFET器件最大衬底电流应力特性.在比较分析了连续不同电应力后LDD nMOSFET的GIDL(gate-induced drain leakage)电流变化后,发现当器件的栅氧厚度接近1nm,沟长接近100nm时,最大衬底电流应力不是电子注入应力,也不是电子和空穴的共同注入应力,而是一种空穴注入应力,并采用空穴应力注入实验、负最大衬底电流应力实验验证了这一结论. 相似文献
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研究了90nm工艺条件下的轻掺杂漏(lightly-doped drain,LDD)nMOSFET器件最大衬底电流应力特性.在比较分析了连续不同电应力后LDD nMOSFET的GIDL(gate-induced drain leakage)电流变化后,发现当器件的栅氧厚度接近1nm,沟长接近100nm时,最大衬底电流应力不是电子注入应力,也不是电子和空穴的共同注入应力,而是一种空穴注入应力,并采用空穴应力注入实验、负最大衬底电流应力实验验证了这一结论. 相似文献
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