一款灌入/拉出3A电流跨导驱动快速瞬态响应低漏失稳压器

本文设计了一款可以灌入(sink)和拉出(source)3A电流,低电源、低功耗的CMOS低漏失电压线性稳压器。采用电流镜像结Gm(跨导)驱动的LDO架构可以获得高稳定性和快速负载瞬态响应。基于UMC 0.5um标准CMOS工艺投片验证,芯片面积为1.0mm2。空载时该LDO静态电流为220uA,最大带载3A。测试表明,使用30uF陶瓷电容,在-1.8A到 1.8A 0.1us负载跳变时,该LDO可以在低于2us的时间达到稳态,且过冲小于1mV。     

一种结构简单的斜坡补偿设计

针对峰值电流模PWM升压型DC-DC变换器,提出了一款结构简单、易于集成的斜坡补偿电路。该补偿电路中的斜坡产生电路,利用恒流源对电容充放电产生的锯齿波电压作电压/电流(V/I)转换,得到斜率易于调节的斜坡电流;电流采样电路利用SENSEFET作为采样器件,并结合优化的缓冲级和简洁的V/I转换电路,使采样精度提高的同时减小了损耗。整个电路基于某公司的0.6μm 15V BCD工艺,在Cadence Spectre平台上进行仿真。仿真结果表明该电路有效的抑制了亚谐波振荡,采样精度达到81.9%,补偿斜率的精度达到82.2%,证明了该电路的可行性。     

升压型DC—DC变换器电流环路补偿设计

针对固定频率峰值电流模式PWM升压型DC—DC变换器,给出了一种结构简单、易于集成的电流环路补偿电路的设计方法。该电路的斜坡产生电路可对片内振荡器充放电电容上的电压作V/I转换。其所得到的斜坡电流具有稳定、斜率易于调节等特点;而电流采样电路主体采用SENSEFET结合优化的缓冲级和V／I转换电路,从而在提高采样精度的同时。还减小了损耗。整个电路可采用0．6μm 15V BCD工艺实现。通过Cadence Spectre进行的仿真结果表明,该电路可有效地抑制亚谐波振荡,采样精度达到77．9％,补偿斜率精度达到81．5％。     

A 3 A sink/source current fast transient response low-dropout Gm driven linear regulator

A 3 A sink/source G_m-driven CMOS low-dropout regulator(LDO),specially designed for low input voltage and low cost,is presented by utilizing the structure of a current mirror G_m(transconductance)driving technique,which provides high stability as well as a fast load transient response.The proposed LDO was fabricated by a 0.5μm standard CMOS process,and the die size is as small as 1.0 mm~2.The proposed LDO dissipates 220μA of quiescent current in no-load conditions and is able to deliver up to 3 A of load current.The measured results show that the output voltage can be resumed within 2μs with a less than 1mV overshoot and undershoot in the output current step from-1.8 to 1.8 A with a 0.1μs rising and falling time at three 10μF ceramic capacitors.