一种0.18μm CMOS工艺单电感单模块正交卫星导航接收机射频前端设计

本文介绍了一种改进的单模块化卫星导航射频前端模块的设计.该结构将低噪声放大器,混频器以及压控振荡器层叠级联,并实现电流和功能的复用.仅采用了单个片上螺旋电感作为LC振荡回路,另外增加一个二分电路作为正交本振信号的产生源.文章讨论了该模块的增益规划,噪声系数,以及设计的细节.对相位噪声以及功耗进行了改进.通过0.18μm CMOS射频工艺进行流片验证,获得带内平均噪声系数为5.4dB,增益43dB,三阶交调点-39dBm.测得相位噪声在本振1MHz偏移处小于-105dBc/Hz.整体功耗小于19.8mW,工作电压为1.8V.实验结果证明满足卫星导航射频前端应用的需要.     

A 0.18μm CMOS single-inductor single-stage quadrature frontend for GNSS receiver

This paper presents an improved merged architecture for a low-IF GNSS receiver frontend,where the bias current and functions are reused in a stacked quadrature LNA-mixer-VCO.Only a single spiral inductor is implemented for the LC resonator and an extra 1/2 frequency divider is added as the quadrature LO signal generator. The details of the design are presented.The gain plan and noise figure are discussed.The phase noise,quadrature accuracy and power consumption are improved.The test chip is fabricated though a 0.18μm RF CMOS process. The measured noise figure is 5.4 dB on average,with a gain of 43 dB and a IIP3 of-39 dBm.The measured phase noise is better than -105 dBc/Hz at 1 MHz offset.The total power consumption is 19.8 mW with a 1.8 V supply. The experimental results satisfy the requirements for GNSS applications.