基于静电力的微液滴驱动芯片

为了精确操控微流体,设计并制作了一种基于静电力的微液滴驱动芯片.介绍了驱动原理和工艺流程,搭建了驱动检测实验平台.芯片采用开放式的结构,只需单层共平面控制电极,以硅作衬底,氧化硅和多晶硅作绝缘层,重掺杂多晶硅为驱动电极阵列,高质量Si3N4作介质层,碳氟聚合物为疏水层.实验表明:微液滴可在芯片上按程序设定方式在二维平面...     

In situ nanoscale refinement by highly controllable etching of the(111) silicon crystal plane and its influence on the enhanced electrical property of a silicon nanowire

Nanoscale refinement on a(100) oriented silicon-on-insulator(SOI) wafer was introduced by using tetra-methyl-ammonium hydroxide(TMAH,25 wt%) anisotropic silicon etchant,with temperature kept at 50℃to achieve precise etching of the(111) crystal plane.Specifically for a silicon nanowire(SiNW) with oxide sidewall protection,the in situ TMAH process enabled effective size reduction in both lateral(2.3 nm/min) and vertical (1.7 nm/min) dimensions.A sub-50 nm SiNW with a length of microns with uniform triangular cross-section was achieved accordingly,yielding enhanced field effect transistor(FET) characteristics in comparison with its 100 nm-wide pre-refining counterpart,which demonstrated the feasibility of this highly controllable refinement process. Detailed examination revealed that the high surface quality ofthe(111) plane,as well as the bulk depletion property should be the causes of this electrical enhancement,which implies the great potential of the as-made cost-effective SiNW FET device in many fields.     

基于温度梯度驱动的液滴传输行为研究

设计并制作了一种基于温度梯度驱动的液滴传输芯片,以实现对微液滴传输的精确控制.介绍了驱动原理和工艺流程,分析了仿真和实验结果.该芯片利用温度梯度下液滴表面形成的表面张力梯度来传输液滴,采用玻璃作为衬底,Ti为电阻加热器,Au为电极,PECVD氧化硅为介质层,碳氟聚合物为疏水层,实现了器件制作.芯片采用开放式结构,制作工艺简单,操作方便.测试结果表明,驱动功率为0.38 W时,去离子水和硅油的传输速率分别达到0.1 mm/s和1 mm/s.     

基于激光切割的叉指结构悬臂梁式压电振动能量采集器

为了拓宽有效的输出带宽,通过激光切割法进行加工,设计并制备了一种具有叉指结构的锆钛酸铅(PZT)悬臂梁式压电振动能量采集器(PVEH)。仿真结果显示,相比常规的悬臂梁式PVEH,具有叉指结构的悬臂梁式PVEH拥有更低的一阶固有频率以及更多的输出电压峰值。利用双通道示波器、函数信号发生器、振动台、加速度计和功率放大器等搭建测试平台,对制备的悬臂梁式PVEH进行测试。结果表明,在0.5g加速度的条件下,常规的悬臂梁式PVEH的固有频率为30.80 Hz,输出电压峰值为4.88 V;具有叉指结构(叉指数目为8且叉指长度为40 mm)的悬臂梁式PVEH具有4个固有频率,分别为17.70、37.30、74和81 Hz,对应的输出电压峰值分别为7.28、3.07、0.366和0.084 V。通过对比研究发现,具有叉指结构的悬臂梁式PVEH的一阶固有频率降低了42.53%,一阶输出电压峰值提升了49.18%,实现了性能的有效提升。     

基于硅(111)晶面腐蚀的可控在线细化工艺及其对硅纳米线电学性能的改善

Nanoscale refinement on a (100) oriented silicon-on-insulator (SOI) wafer was introduced by using tetra-methyl-ammonium hydroxide (TMAH, 25 wt%) anisotropic silicon etchant, with temperature kept at 50 ℃ to achieve precise etching of the (111) crystal plane. Specifically for a silicon nanowire (SiNW) with oxide sidewall protection, the in situ TMAH process enabled effective size reduction in both lateral (2.3 nm/min) and vertical (1.7 nm/min) dimensions. A sub-50 nm SiNW with a length of microns with uniform triangular cross-section was achieved accordingly, yielding enhanced field effect transistor (FET) characteristics in comparison with its 100 nm-wide pre-refining counterpart, which demonstrated the feasibility of this highly controllable refinement process. Detailed examination revealed that the high surface quality of the (111) plane, as well as the bulk depletion property should be the causes of this electrical enhancement, which implies the great potential of the as-made cost-effective SiNW FET device in many fields.