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In this paper, we present the design of a CMOS current operational amplifier (COA). A design technique based on current steering is proposed to enhance the frequency capability of the amplifier and achieve higher bandwidth of operation. A complete COA was designed and fabricated using a 1.2-μm CMOS technology, the COA occupies an area of 0.13 mm2. Results from HSPICE simulations and measurements indicate an open-loop gain of 70 dB, a gain-bandwidth product exceeding 200 MHz, and a settling time of 5.1 ns. The amplifier operated under ±3 V DC voltage supplies, and the power dissipation is approximately 4.5 mW 相似文献
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Abou-Allam E. Nisbet J.J. Maliepaard M.C. 《Solid-State Circuits, IEEE Journal of》2001,36(10):1434-1443
This paper describes the design of a 1.9-GHz front-end receiver. The target application of the receiver is the personal communications standard PCS1900. Powered by a 1-V supply, the receiver consists of a low noise amplifier (LNA) and a downconversion mixer. The receiver was fabricated within a 0.5-μm CMOS technology. The LNA features 15 dB of gain and a 1.8-dB noise figure. The mixer exhibits 1.5-dB conversion loss, 12-dB noise figure, and 0 dBm 1 dB-compression point 相似文献
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A CMOS realisation of a current operational amplifier operating under 3 V supply voltage is presented. The proposed implementation provides very high common-mode rejection. Results of HSPICE simulation show a high open loop current gain of 67 dB, a gain-bandwidth product of -100 MHz and a common-mode rejection ratio of 150 dB 相似文献
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