Spreading and power allocation for multiple antenna transmission using decorrelating receivers

We propose a new scheme for multiple antenna transmission in the context of spread-spectrum signaling. The new scheme consists of using shifted Gold sequences to modulate independent information on the multiple antennas. We show that this strategy of using multiphase spreading (MPS) on different antennas greatly improves the throughput over currently known spread-spectrum multiple-antenna methods. We also find the optimal power allocation strategy among multiple transmit antennas for a fixed rate of channel state information, which might be provided via a feedback link, at the transmitter. We demonstrate the differences in optimal power distribution for maximizing capacity and minimizing probability of outage. When the transmission from the two antennas uses orthogonal spreading, we find that optimizing the power does not give much gain over the equal power transmission. However, when the transmissions are not orthogonal as in the case of MPS, then allocating power to maximize throughput gives considerable gain over equal power transmission. We also consider the effect of imperfections in the feedback channel on the optimal power allocation and show that our power allocation scheme is robust to feedback errors.     

Code Designs for Cooperative Communication

The goal of this article is to discuss the implementation of two cooperative protocols - decode-and-forward (DF) and estimate-and-forward (EF). In each case, the starting point is an information theoretic random coding scheme, which motivates a practical code construction. Low-density parity check (LDPC) codes are used as components in both protocols. In DF relaying, the problem boils down to a search for multi-rate LDPC codes that simultaneously perform well for the source-relay and the source- destination links. On the other hand, in EF relaying, the challenge is to design an efficient quantizer for forming a compressed estimate at the relay. The performance of each scheme is comparable to theoretical limits.     

Efficient VLSI Architectures for Multiuser Channel Estimation in Wireless Base-Station Receivers

This paper presents a reduced-complexity, fixed-point algorithm and efficient real-time VLSI architectures for multiuser channel estimation, one of the core baseband processing operations in wireless base-station receivers for CDMA. Future wireless base-station receivers will need to use sophisticated algorithms to support extremely high data rates and multimedia. Current DSP implementations of these algorithms are unable to meet real-time requirements. However, there exists massive parallelism and bit level arithmetic present in these algorithms than can be revealed and efficiently implemented in a VLSI architecture. We re-design an existing channel estimation algorithm from an implementation perspective for a reduced complexity, fixed-point hardware implementation. Fixed point simulations are presented to evaluate the precision requirements of the algorithm. A dependence graph of the algorithm is presented and area-time trade-offs are developed. An area-constrained architecture achieves low data rates with minimum hardware, which may be used in pico-cell base-stations. A time-constrained solution exploits the entire available parallelism and determines the maximum theoretical data processing rates. An area-time efficient architecture meets real-time requirements with minimum area overhead.     

Multitier Wireless Communications

Next-generation computing systems will be highly integrated using wireless networking. The Rice Everywhere NEtwork (RENÉ) project is exploring the integration of WCDMA cellular systems, high speed wireless LANs, and home wireless networks to produce a seamless multitier network interface. We are currently developing a simulation acceleration testbed and a multitier network interface card (mNIC) consisting of DSP processors, custom VLSI ASICs, and FPGAs for baseband signal processing to interact with the various RF units and the host processor. This testbed will also allow us to explore high performance algorithm alternatives through computer aided design tools for rapid prototyping and hardware/software co-design of embedded systems.     

Algorithms for Wireless Communication Systems: A Power-Efficiency Perspective

Within the last five years, there has been a cultural shift from wired landlocked connectivity to pervasive wireless information access. Most emerging mobile devices are now equipped with some form of embedded wireless radio. The expectations of high data rates and increased battery longevity have put tremendous pressure on all aspects of wireless system design.The goal of our projects at the Center for Multimedia Communication at Rice is to develop powerefficient wireless enabled mobile devices. In this paper, we will consider the control and coding issues to increase active access time of mobile communication devices. In particular, we develop scheduling algorithms which adaptively change the transmission power and rate, based on both the transmission queue backlog and the channel conditions. Thepacket level control algorithms exploit burstiness of data streams and channel variations to trade packet queuing delay with the average transmit power. The wide range of data rates dictated by the scheduler and our power efficiency objective is effectively met by a multi-antenna transceiver. We design non-coherent space-time codes for high mobile speeds, and space-time feedback strategies for low mobility applications. This paper highlights some of the proposed methods and presents some preliminary results. This revised version was published online in August 2006 with corrections to the Cover Date.     

VLSI Implementation of the Multistage Detector for Next Generation Wideband CDMA Receivers

The multistage detection algorithm has been proposed as an effective interference cancellation scheme for next generation Wideband Code Division Multiple Access (W-CDMA) base stations. In this paper, we propose a real-time VLSI implementation of this detection algorithm in the uplink system, where we have achieved both high performance in interference cancellation and computational efficiency. When interference cancellation converges, the difference of the detection vectors between two consecutive stages is mostly zero. Under the assumption of BPSK modulation, the differences between the bit estimates from consecutive stages are 0 and ±2. Bypassing the zero terms saves computations. Multiplication by ±2 can be easily implemented in hardware as arithmetic shifts. However, the convergence of the algorithm is dependent on the number of users, the interference and the signal to noise ratio and hence, the detection has a variable execution time. By using just two stages of the differencing detector, we achieve predictable execution time with performance equivalent to at least eight stages of the regular multistage detector. A VLSI implementation of the differencing multistage detector is built to demonstrate the computational savings and the real-time performance potential. The detector, handling up to eight users with 12-bit fixed point precision, was fabricated using a 1.2 m CMOS technology and can process 190 Kbps/user for 8 users.     

Low density parity check codes for the relay channel

We propose Low Density Parity Check (LDPC) code designs for the half-duplex relay channel. Our designs are based on the information theoretic random coding scheme for decode-and-forward relaying. The source transmission is decoded with the help of side information in the form of additional parity bits from the relay. We derive the exact relationships that the component LDPC code profiles in the relay coding scheme must satisfy. These relationships act as constraints for the density evolution algorithm which is used to search for good relay code profiles. To speed up optimization, we outline a Gaussian approximation of density evolution for the relay channel. The asymptotic noise thresholds of the discovered relay code profiles are a fraction of a decibel away from the achievable lower bound for decode-and-forward relaying. With random component LDPC codes, the overall relay coding scheme performs within 1.2 dB of the theoretical limit     

Optimal Relay Selection for Energy-Efficient Multicast

We consider multicast transmission from a single source to multiple destinations. We assume that the source cannot reach the destinations directly, but must forward its traffic through a set of assisting relay nodes. The performance objective under consideration is to maximize the common amount of information (number of bits) that the source delivers to all destinations per joule of the total energy spent. Our aim is to obtain a policy that identifies: (a) which subset of the relays should be activated, (b) for how long, and (c) the respective destinations that each relay has to serve. We consider centralized policies with exact knowledge of the channel conditions. In the special case of networks employing at most two relays, we show that for any fixed assignment of destinations to relays the problem of maximizing the number of bits per joule by choosing the duration that each relay should be activated can be formulated as a convex optimization problem. Unfortunately, the problem of assigning destinations to relays is combinatorially complex. Thus, in the sequel we present a method with reduced complexity that exploits the knowledge of the underlying channel conditions to perform this assignment. Finally, we provide a set of numerical results to illustrate the optimal relay selection and assignment of destinations to relays corresponding to different channel conditions.