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A new approach for the analysis of the efficiency and linearity of Chireix-outphasing combiners is presented. The approach takes into account, in an explicit manner, the effect of impedance mismatch between the amplifiers and the lossless combining structure. It is shown that the impedance mismatch leads to new expressions for the output voltages from both branches of the amplifier. These expressions explain the origin of the lack of linearity reported in the literature for the Chireix architecture and lead to a new expression for the instantaneous efficiency of a Chireix combiner. Various simulations using a commercial simulator are performed and their results are compared to those predicted by the derived equations. A quasi-exact agreement between the simulator and derived equations is found for all simulations conducted, including voltage expressions, linearity analysis, and instantaneous and average efficiency calculations for a code-division multiple-access signal. The impact of combiner parameters on its linearity and efficiency is also studied.  相似文献   
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