Power-aware network swapping for wireless palmtop PCs

Virtual memory is considered to be an unlimited resource in desktop or notebook computers with high storage capabilities. However, in wireless mobile devices, like palmtops and personal digital assistants (PDAs), storage memory is limited or absent due to weight, size, and power constraints, so that swapping over remote memory devices can be considered as a viable alternative. However, power-hungry wireless network interface cards (WNICs) may limit the battery lifetime and application performance if not efficiently exploited. In this paper, we study performance and energy of network swapping in comparison with swapping on local microdrives and flash memories. We report the results of extensive experiments conducted on different WNICs and local swapping devices, using both synthetic and natural benchmarks. Our study points out that remote swapping over power-manageable WNICs can be more efficient than local swapping, especially in bursty workload conditions. Such conditions can be forced where possible by reshaping swapping requests to increase energy efficiency and performance.     

Surveillance after colorectal cancer surgery

Early diagnosis of local and distant recurrences of colorectal cancer remains difficult and there is no agreement on the effectiveness of follow-up in these patients. The aim of this study is to assess the value of our method of follow-up. We consider 239 patients with colorectal cancer and at least 2 years follow-up following radical resection. A local recurrence appeared in 26 patients (10.9%), a distant metastasis in 41 (17.1%), while in seven (2.9%) local and distant recurrences appeared simultaneously. Local recurrence was detected because of an increase in carcinoembryonic antigen (CEA) level in 15 patients (57.7%), during a scheduled endoscopy in four (15.4%) and because of symptoms in seven (26.9%). In seven patients (26.9%) a radical resection was possible. Distant metastases were detected by CEA levels in 20 patients (48.8%), by ultrasonography (U.S.) in 12 (29.3%) and by chest X-ray in five (12.2%). In 13 of 26 patients with liver metastases a resection was performed. This study shows that few patients benefit from follow-up and only CEA levels and liver U.S. performed intensively between 15 and 36 months after surgery are useful in early detection of recurrences. A modification of the follow-up to the single patient, according to the stage, location and grading of cancer, could improve the results, so lowering the costs of this expensive practice.     

Pulmonary metabolism of beta-endorphin in asthmatic patients in asymptomatic periods and after bronchospasm induced by methacholine

Blood concentration of endogenous beta-endorphines can change during the clinical evolution of chronic bronchopneumopathies. The authors assessed the beta-endorphine concentrations in the pulmonary arterial and systemic arterial blood in 8 asthmatic patients during a symptom-free period and after methacholine-induced bronchospasm. The beta-endorphine analysis was performed in duplicate dor each sample, by means of a RIA assay. There is not difference in the systemic arterial blood concentration of beta-endorphines between asthmatic patients and normal subjects. Furthermore, there is no change in the beta-endorphine blood concentration during the passage through the pulmonary tissue after methacoline-induced bronchospasm.     

Specification and analysis of power-managed systems

Dynamic power management encompasses several techniques for reducing energy dissipation in electronic systems by selective slowdown or shutdown of components. We present a theoretical framework for explaining and classifying different approaches to power management. Within this framework, we model power-manageable components, workloads, and controllers as discrete-event systems (DESs). The structure of these DESs is specified in terms of physical states (representing operation modes) and events (triggering state transitions), while system behavior is specified in terms of next-event and next-state functions. In particular, nondeterministic next-event and next-state functions are modeled by conditional probability distributions, according to generalized semi-Markov processes (GSMPs). The modeling framework provides a general denotational model for system specification and a rigorous execution semantics that enables event-driven simulation. We introduce a modeling framework, built on top of MathWork's Simulink, supporting the specification and execution of our model. In particular, we present templates for the Simulink simulator to execute GSMP models, and we describe how to use such templates for specifying, analyzing, and optimizing dynamic power-managed systems. Finally, we demonstrate the expressive power and versatility of the proposed approach by using the modeling framework and the simulator for the analysis of representative real-life case studies, including the Intel Xscale processor architecture, a multitasking real-time system, and a sensor network.     

Performance Analysis of Arbitration Policies for SoC Communication Architectures

As technology scales toward deep submicron, the integration of a large number of IP blocks on the same silicon die is becoming technically feasible, thus enabling large-scale parallel computations, such as those required for multimedia workloads. The communication architecture is becoming the bottleneck for these multiprocessor Systems-on-Chip (SoC), and efficient contention resolution schemes for managing simultaneous access requests to the shared communication resources are required to prevent system performance degradation. The contribution of this work is to analyze the impact on multiprocessor SoC performance of different bus arbitration policies under different communication patterns, showing the distinctive features of each policy and the strong correlation of their effectiveness with the communication requirements of the applications. Beyond traditional arbitration schemes such as round robin and TDMA, another policy is considered that periodically allocates a temporal slot for contention-free bus utilization to a processor which needs fixed predictable bandwidth for the correct execution of its time-critical task. The results are derived on a complete and scalable multiprocessor SoC simulation platform based on SystemC, whose software support includes a complete embedded multiprocessor OS (RTEMS). The communication architecture is AMBA compliant, and we exploit the flexibility of this multi-master commercial standard, which does not specify the arbitration algorithm, to implement the explored contention resolution schemes.     

Polyvinyl alcohol as a defined substitute for serum in vitrification and warming solutions to cryopreserve ovine embryos at different stages of development

The purpose of this study was to assess the viability of ovine embryos after replacing fetal calf serum (FCS) with polyvinyl alcohol (PVA) in vitrification and warming solutions. Ovine embryos were obtained from superovulated Sardinian breed ewes at 4, 5, 6, and 7 days after insemination. All vitrification and warming solutions were prepared using buffered saline solution with 20% FCS (group a) or 0.1% PVA (group b). Embryos were vitrified in 20 microliters of glycerol 3.4 M + ethylene glycol 4.6 M and loaded into the centre of 0.25 ml straws between two columns of sucrose solution (0.5 M), and plunged immediately into liquid nitrogen. After being warmed in a water bath at 35 degrees C for 10 s, the vitrified embryos were moved to 0.25 M sucrose solution for 3 min. Embryos were cultured in TCM-199 after washing with 10% FCS and sheep oviductal epithelial cells up to hatching or re-expansion of the blastocoelic cavity. No significant difference in the viability rates was observed between embryos vitrified/warmed in PVA or FCS solutions. In both groups, the rate of in vitro viability was (P < 0.01) lower at the precompacted and compacted morula stages than at the expanded, hatching or hatched blastocyst stage. In both groups, early blastocysts were less viable than expanded (P < 0.01), hatching or hatched blastocyst (P < 0.05). There was no significant difference in survival rates at days 14 (79 and 76%) and 45 (63 and 59%) after transfer into sychronised recipients between vitrified expanded blastocysts of groups a and b, respectively. These results suggest that it is possible replace serum with PVA in vitrification and warming solutions without reducing in vivo and in vitro viability.     

Crosstalk-based capacitance measurements: theory and applications

Geometry scaling increases the relative effect of coupling capacitances on performance, power, and noise so that they need to be carefully taken into account during process development, characterization, and monitoring. In the last decade, charge-based capacitance measurements (CBCMs) have been widely used to estimate on-chip wiring and coupling capacitances because of their accuracy and simplicity. We provide a thorough theoretical and experimental study of CBCMs applied to the selective extraction of cross-coupling capacitances. We take a historical perspective starting from the original CBCM approach proposed by Chen in 1996, and we present a new technique for crosstalk-based capacitance measurements (CTCMs). CTCMs improve the accuracy and usability of CBCMs while reducing the complexity of the test structures. We present the theory of CTCM, we provide experimental results demonstrating its improved accuracy, and we discuss its application to a wide range of process monitoring and testing tasks. Experimental results are used throughout the paper to support the discussion.     

MPARM: Exploring the Multi-Processor SoC Design Space with SystemC

Technology is making the integration of a large number of processors on the same silicon die technically feasible. These multi-processor systems-on-chip (MP-SoC) can provide a high degree of flexibility and represent the most efficient architectural solution for supporting multimedia applications, characterized by the request for highly parallel computation. As a consequence, tools for the simulation of these systems are needed for the design stage, with the distinctive requirement of simulation speed, accuracy and capability to support design space exploration. We developed a complete simulation platform for a MP-SoC called MP-ARM, based on SystemC as modelling and simulation environment, and including models for processors, the AMBA bus compliant communication architecture, memory models and support for parallel programming. A fully operating linux version for embedded systems has been ported on this platform, and a cross-toolchain has been developed as well. Our MP simulation environment turns out to be a powerful tool for the MP-SOC design stage. As an example thereof, we use our tool to evaluate the impact on system performance of architectural parameters and of bus arbitration policies, showing that the effectiveness of a particular system configuration strongly depends on the application domain and the generated traffic profile.Luca Benini received the B.S. degree (summa cum laude) in electrical engineering from the University of Bologna, Italy, in 1991, and the M.S. and Ph.D. degrees in electrical engineering from Stanford University in 1994 and 1997, respectively. He is an associate professor in the department of electronics and computer science in the University of Bologna. He also holds visiting researcher positions at Stanford University and the Hewlett-Packard Laboratories, Palo Alto, CA.Dr. Benini’s research interests are in all aspects of computer-aided design of digital circuits, with special emphasis on low-power applications, and in the design of portable systems. He is co-author of the book: Dynamic Power management, Design Techniques and CAD tools, Kluwer 1998.Dr. Benini is a member of the technical program committee for several technical conferences, including the Design Automation Conference, the International Symposium on Low Power Design and the International symposium on Hardware-Software Codesign.Davide Bertozzi received the B.S. degree in electrical engineering from the University of Bologna, Bologna, Italy, in 1999.He is currently pursuing the Ph.D. degree at the same University and is expected to graduate in 2003. His research interests concern the development of SoC co-simulation platforms, exploration of SoC communication architectures and low power system design.Alessandro Bogliolo received the Laurea degree in electrical engineering and the Ph.D. degree in electrical engineering and computer science from the University of Bologna, Bologna, Italy, in 1992 and 1998.In 1995 and 1996 he was a Visiting Scholar at the Computer Systems Laboratory (CSL), Stanford University, Stanford, CA.From 1999 to 2002 he was an Assistant Professor at the Department of Engineering (DI) of the University of Ferrara, Ferrara, Italy. Since 2002 he’s been with the Information Science and Technology Institute (STI) of the University of Urbino, Urbino, Italy, as Associate Professor. His research interests are mainly in the area of digital integrated circuits and systems, with emphasis on low power and signal integrity.Francesco Menichelli was born in Rome in 1976. He received the Electronic Engineering degree in 2001 at the University of Rome “La Sapienza”. From 2002 he is a Ph.D. student in Electronic Engineering at “La Sapienza” University of Rome.His scientific interests focus on low power digital design, and in particular in level tecniques for low power consumption, power modeling and simulation of digital systems.Mauro Olivieri received a Master degree in electronic engineering “cum laude” in 1991 and a Ph.D. degree in electronic and computer engineering in 1994 from the University of Genoa, Italy, where he also worked as an assistant professor. In 1998 he joined the University of Rome “La Sapienza”, where he is currently associate professor in electronics. His research interests are digital system-on-chips and microprocessor core design. Prof. Olivieri supervises several research projects supported by private and public fundings in the field of VLSI system design.     

Virtual simulation of distributed IP-based designs

JavaCAD, an Internet-based tool with a secure client-server architecture, lets designers perform functional simulation, fault simulation, and cost estimation of circuits containing IP components. It also ensures IP protection for both IP vendors and users, and provides seamless transition between IP evaluation and purchase