High-order electromechanical /spl Sigma//spl Delta/ modulation in micromachined inertial sensors

Analysis of second-order electromechanical sigma-delta (/spl Sigma//spl Delta/) inertial sensors shows that in-band quantization error introduces a resolution penalty, which cannot be eliminated by oversampling. In addition, a tradeoff between resolution and phase compensation forces such systems to operate with reduced phase margin. This paper introduces high-order electromechanical /spl Sigma//spl Delta/ modulation as an approach, which eliminates the quantization noise overhead and allows for increased phase compensation without degrading the resolution. Quasi-linear analysis is used to evaluate the contribution of the individual noise sources to the output of the system and to examine the effect of noise interaction on the behavior of electromechanical /spl Sigma//spl Delta/ modulators.     

The design of sigma-delta modulation analog-to-digital converters

The author examines the practical design criteria for implementing oversampled analog/digital converters based on second-order sigma-delta (ΣΔ) modulation. Behavioral models that include representation of various circuit impairments are established for each of the functional building blocks comprising a second-order Σ2gD modulator. Extensive simulations based on these models are then used to establish the major design criteria for each of the building blocks. As an example, these criteria are applied to the design of a modulator that has been integrated in a 3-μm CMOS technology. An experimental prototype operates from a single 5-V supply, dissipates 12 mW, occupies an area of 0.77 mm², and has achieved a measured dynamic range of 89 dB     

A 13-bit, 1.4-MS/s sigma-delta modulator for RF baseband channelapplications

A 13-bit, 1.4-MS/s, sixth-order cascaded sigma-delta modulator oversampling at 16 X is implemented in a 0.72 μm complementary metal-oxide-semiconductor process for use in the baseband path of a radio-frequency receiver. The modulator achieves 77 dB of dynamic range and dissipates 81 mW from a 3.3 V supply. It is characterized for the blocking and intermodulation requirements of a cordless telephone application     

Electromechanical Resonances in Ceramic Capacitors and Their Use for Rapid Nondestructive Testing

A rapid nondestructive test method for ceramic multilayer capacitors made from piezoelectric materials such as barium titanate or lead-containing materials is described and evaluated. The test method is based on the internal excitation of standing acoustic waves in the capacitors. The standing waves are severely dampened by defects such as indentations and delaminations or warped electrodes. An undampened resonance is a good indication of a defect-free ceramic multilayer capacitor. This finding was used in a nondestructive test setup to evaluate about 1000 capacitors. Through metallographic (cross-section) examination, a sorting accuracy of 2% false accepts and 8% false rejects was determined for the highspeed test setup. The test setup has the potential to test over 100 000 capacitors an hour. [Key words: capacitors, nondestructive testing, multilayers, mechanical properties, electrical properties.]     

A multimode digital detector readout for solid-state medicalimaging detectors

A multipurpose digital detector readout for medical imaging applications is presented. The readout is capable of measuring both current and charge, allowing a single detector array to perform imaging functions previously accomplished with two separate machines. The circuit employs a variable rate ΣΔ analog-to-digital converter (ADC) to measure current over a 130-dB dynamic range in a 1 kHz band and resolve charge pulses down to 360 e^- at 100 000 events/s. Detector currents of up to 7 μA and charge pulses as large as 25 fC can be measured. A low-noise charge sensing amplifier (CSA) is combined with digital pulse shaping to optimize the noise performance and flexibility of the charge measurements. Fabricated in an 1.2 μm complimentary metal-oxide-semiconductor (CMOS), the circuit occupies 1.5 mm² and dissipates 11 mW/channel from a 5 V supply     

A 256-element CMOS imaging receiver for free-space optical communication

This paper describes a CMOS imaging receiver for free-space optical (FSO) communication. The die contains 256 optical receive channels with -47 dBm optical sensitivity and 30 dB optical dynamic range at 500 kb/s/channel while consuming 67 mW. Received signals are amplified by digitally self-calibrated open-loop amplifiers and digitized before clock and data recovery. The sampled data also provide inputs for digital automatic gain and offset control loops closed around the analog amplifier chain to compensate for signal variations due to atmospheric turbulence and daylight interference. Gain control logic can adapt to incident signals over the 30 dB dynamic range within 28 bit periods. Low-power logic design and analog circuit techniques are used to minimize digital crosstalk to single-ended photodetectors referenced to a bulk substrate. Local arbitration circuitry at each channel forms an intrachip data passing network to multiplex received data words from the 16 /spl times/ 16 array onto a common off-chip bus. The 1.6 M transistor mixed-signal die fabricated in a 0.25 /spl mu/m CMOS process measures 6.5/spl times/6.5 mm/sup 2/. Reception at 500 kb/s through a 1.5 km atmospheric channel is demonstrated with 3 mW optical transmit power during nighttime and daylight hours.     

A three-axis micromachined accelerometer with a CMOS position-senseinterface and digital offset-trim electronics

This paper describes a three-axis accelerometer implemented in a surface-micromachining technology with integrated CMOS. The accelerometer measures changes in a capacitive half-bridge to detect deflections of a proof mass, which result from acceleration input. The half-bridge is connected to a fully differential position-sense interface, the output of which is used for one-bit force feedback. By enclosing the proof mass in a one-bit feedback loop, simultaneous force balancing and analog-to-digital conversion are achieved. On-chip digital offset-trim electronics enable compensation of random offset in the electronic interface. Analytical performance calculations are shown to accurately model device behaviour. The fabricated single-chip accelerometer measures 4×4 mm², draws 27 mA from a 5-V supply, and has a dynamic range of 84, 81, and 70 dB along the x-, y-, and z-axes, respectively     

Testing low-flame-spread wallcoverings on typical construction substrates in ASTM E84

Model building codes currently exempt wallcoverings less than 1/28 inch thick from any form of testing if their surface burning characteristics are no greater than paper wallcovering of the same thickness. However, theLife Safety Code Handbook points out that both the substrate and the air cavity behind the substrate may affect the performance of thin wallcoverings in fire conditions and recommends that wallcoverings less than 1/28 inch thick also be tested as they would be installed in the field. Model building code requirements regulate the surface burning characteristics of building materials by referencing, or basing their own standards on, ASTM E84. To determine whether ASTM E84 could be adapted to produce useable flame spread results when wallcoverings were tested on an actual wall assembly, two ASTM E84 tests were conducted on one low-flame-spread-rated-wallcovering with an FSI of 5 at Underwriters Laboratories' facility in Northbrook, Illinois. Both tests used 5/8-inch Type X gypsum board as the construction substrate on full wall assemblies. Results indicated that the wallcovering performed differently when tested as a wall assembly.