An Energy-efficient Switching Scheme with Reduced Switching Transients for a Wind-driven Induction Generator

This article presents a scheme for improving the power output of grid-connected induction generator commonly used in wind energy conversion systems. Generally, the stator of the induction generator is connected in a star with a line voltage of √3 times the rated winding voltage to reduce the line current and, hence, conductor size. To extend the generating operation over a wider speed range, delta-star switchable stator windings are also in vogue. In such cases, the stator is star connected in the lower speed range and switched to a delta connection above a threshold speed. In this study, a new switching scheme is proposed wherein the stator coils are always connected in a star, while the stator is connected to different voltages in low- and high-speed conditions. At low wind speeds, nominal winding voltage is applied to the stator, whereas at higher speeds, the stator applied voltage is √3 times higher than the rated winding voltage. The efficacy of the scheme is demonstrated experimentally with a suitable microcontroller-based switching arrangement. Typical results indicate an increase in output with reduced switching transients. A case study on a 3-Φ, 50-kW induction generator is presented to emphasize the performance improvement with the proposed scheme.     

A CMOS transconductor with 80-dB SFDR up to 10 MHz

A CMOS transconductor uses resistors at the input and an OTA in unity-gain feedback to achieve 80-dB spurious-free dynamic range (SFDR) for 3.6-V_pp differential inputs up to 10 MHz. The combination of resistors at the input and negative feedback around the operational transconductance amplifier (OTA) allows this transconductor to accommodate a differential input swing of 4 V with a 3.3-V supply. The total harmonic distortion (THD) of the transconductor is -77 dB at 10 MHz for a 3.6-V_pp differential input and third-order intermodulation spurs measure less than -79 dBe for 1.8-V_pp differential inputs at 1 MHz. The transconductance core dissipates 10.56 mW from a 3.3-V supply and occupies 0.4 mm² in a 0.35-μm CMOS process     

Validating a driving simulator using surrogate safety measures

Traffic crash statistics and previous research have shown an increased risk of traffic crashes at signalized intersections. How to diagnose safety problems and develop effective countermeasures to reduce crash rate at intersections is a key task for traffic engineers and researchers. This study aims at investigating whether the driving simulator can be used as a valid tool to assess traffic safety at signalized intersections. In support of the research objective, this simulator validity study was conducted from two perspectives, a traffic parameter (speed) and a safety parameter (crash history). A signalized intersection with as many important features (including roadway geometries, traffic control devices, intersection surroundings, and buildings) was replicated into a high-fidelity driving simulator. A driving simulator experiment with eight scenarios at the intersection were conducted to determine if the subjects' speed behavior and traffic risk patterns in the driving simulator were similar to what were found at the real intersection. The experiment results showed that speed data observed from the field and in the simulator experiment both follow normal distributions and have equal means for each intersection approach, which validated the driving simulator in absolute terms. Furthermore, this study used an innovative approach of using surrogate safety measures from the simulator to contrast with the crash analysis for the field data. The simulator experiment results indicated that compared to the right-turn lane with the low rear-end crash history record (2 crashes), subjects showed a series of more risky behaviors at the right-turn lane with the high rear-end crash history record (16 crashes), including higher deceleration rate (1.80+/-1.20 m/s(2) versus 0.80+/-0.65 m/s(2)), higher non-stop right-turn rate on red (81.67% versus 57.63%), higher right-turn speed as stop line (18.38+/-8.90 km/h versus 14.68+/-6.04 km/h), shorter following distance (30.19+/-13.43 m versus 35.58+/-13.41 m), and higher rear-end probability (9/59=0.153 versus 2/60=0.033). Therefore, the relative validity of driving simulator was well established for the traffic safety studies at signalized intersections.