Photonic page buffer based on GaAs multiple-quantum-well modulators bonded directly over active silicon complementary-metal-oxide-semiconductor (CMOS) circuits

We present a 2-kbit, 50-Mpage/s, photonic first-in, first-out page buffer based on gallium arsenide/aluminium-gallium arsenide multiple-quantum-well diodes that are flip-chip bonded to submicrometer silicon complementary-metal-oxide-semiconductor circuits. This photonic chip provides nonvolatile storage (buffering), asynchronous-to-synchronous conversion, bandwidth smoothing, tolerance to jitter or skew, spatial format conversion, wavelength conversion, and independent flow control for the input and the output channels. It serves as an interface chip for parallel-accessed optical bit-plane data. It represents the first smart-pixel array that accomplishes the vertical integration of multiple-quantum-well modulators and detectors directly over active silicon VLSI circuits and provides over 340 transistors per optical input-output. Results from high-speed single-channel testing and real-time array operation of the photonic page buffer are reported.     

Symmetric self-electrooptic effect device: optical set-reset latch,differential logic gate, and differential modulator/detector

The symmetric self-electrooptic-effect device (S-SEED), a structure consisting of two p-i-n diodes electrically connected in series and acting as an optically bistable set-reset latch, is discussed. Applications and extensions of this device are also discussed. The devices do not require the critical biasing that is common to most optically bistable devices and thus is more useful for system applications. They have been optically cascaded in a photonic ring counter and have been used to perform different NOR, OR, NAND, and AND logic functions. Using the same device, a differential modulator that generates a set of complementary output beams with a single voltage control lead and a differential detector that gives an output voltage dependent on the ratio of the two optical input powers have been demonstrated     

Optical receivers for optoelectronic VLSI

We describe our work on the design and testing of optical receivers for use in optoelectronic VLSI. The local nature of the optoelectronic VLSI system permits novel receiver designs, incorporating multiple optical beams and/or synchronous operation, while the requirement of realizing large numbers of receivers on a single chip severely constrains area and power consumption. We describe four different receiver designs, and their different operating modes. Results include 1-Gb/s high-impedance, two-beam diode-clamped FET-SEED receivers, single and dual-beam transimpedance receivers realized with a hybrid attachment of multiple-quantum well devices to 0.8-μm linewidth CMOS operating to 1 Gb/s, and synchronous sense-amplifier-based optical receivers with low (~1 mW) power consumption. Finally, we introduce a measure of receiver performance that includes area and power consumption     

1 Gb/s operation and bit-error rate studies of FET-SEEDdiode-clamped smart-pixel optical receivers

Experimental studies of the bit-error rate (BER) of diode-clamped optical receivers based on FET-SEED technology are described. 1 Gb/s operation of a receiver with optical input and electrical output is obtained. A strong dependence of the BER on clamping voltage is reported, confirming the digital nature of the receiver. The best receiver sensitivity measured at 1 Gb/s and an error rate of 1×10 ^-9 is roughly -11 dBm. At 622 Mb/s, it is -22 dBm     

Carrier collection efficiency effects and improvements ofelectroabsorption devices with different barrier structures

Self-electrooptic effect devices (SEEDs) with both thick (60 Å) and thin (35 Å) quantum-well barriers were studied experimentally. Relevant device properties including responsivity, carrier collection efficiency, switching, and optical bistability behavior are compared. SEED modulator photocurrent and reflectivity data are analyzed and shown to predict S-SEED behavior. A simple yet powerful optical technique for measuring the light utilization efficiency and the carrier collection efficiency η is described and used to compare different device mesa sizes and barrier structures. The effects of η on device performance are expounded. For thin-barrier SEEDs, η is substantially improved, approaching 100%, even at bias voltages approaching zero and for small device structures     

Energy scaling and subnanosecond switching of symmetricself-electrooptic effect devices

The authors report the scaling of switching energy with device area for four sizes of symmetric self-electrooptic effect devices, the smallest of which has a switching energy of 3.6 pJ. Switching speeds of ~2 ns at 15 V bias and ~860 ps at 22 V bias were attained by using mode-locked (6 ps) pulses, although the energies in these pulses were somewhat higher, because of saturation of the quantum-well material. Making the device area only moderately larger than the spot size is suggested as a method of avoiding this saturation     

High speed 2×4 array of differential quantum well modulators

The 3-dB bandwidth of the modulators was measured to greater than 3 GHz, and the time response was measured to 200 ps. By using short mode-locked pulses, the 3-dB bandwidth of the devices used as differential detectors was measured to be greater than 4 GHz and the risetime to be ~100 ps     

Ring oscillators with monolithically integrated-optical readoutbased on GaAs-AlGaAs FET-SEED technology

Ring oscillators having integrated-optical readout are realized in GaAs-AlGaAs field-effect transistor self-electro-optic-effect-device (FET-SEED) technology-a monolithic integration technology for FET's and normal-incidence multiple-quantum-well modulators and detectors. Good agreement between simulated and measured DC-inverter-transfer characteristics is shown. At one bias point, ring oscillator frequencies correspond to unity fan-in and fan-out delay values of 129.5 ps/stage. The power-delay product at this bias point was 306 fj. Measurements were made on circuits whose transistors had a transconductance of about 80 mS/mm. Simulations of inverter delay are discussed, including load capacitances, and are found to be in good agreement with experiment     

Field effect transistor-self electrooptic effect device (FET-SEED)differential transimpedance amplifiers for two-dimensional optical datalinks

A 4×18 two-dimensional array of GaAs FET-SEED (field effect transistor-self electrooptic effect device) differential transimpedence receivers has been fabricated for application in massively parallel optical data link board-to-board interconnections. Several FET-SEED receiver arrays were tested and displayed a mean response of ~0.7 mV/μW, and were capable of >100 Mbps per channel operation. The mean receiver sensitivity for a BER of <10^-9 was calculated from the measured noise spectrum to be -26.8 dBm at the system design rate of 40 Mbps (18 k-22 MHz bandwidth), and -23.2 dBm for a 100 Mbps rate (dc-66 MHz bandwidth). A sensitivity of approximately -25 dBm for the 40 Mbps rate was confirmed using a bit-error-rate test set. The theoretical noise is compared to measured values with good agreement assuming a FET channel noise factor of 1.4. The 1/f noise corner frequency of ~13 MHz was found to cause a ~1.2 dB degradation in sensitivity for the 100 Mbps rate. The differential amplifier mean dc output offset voltage was measured to be 10 mV, and displayed a large sigma due to parameter variations in the active devices. Two receiver arrays were successfully used in a demonstration of a fully differential parallel optical small computer system interface (SCSI) data link     

Batch fabrication and structure of integrated GaAs-AlxGa1-xAs field-effect transistor-self-electro-optic effectdevices (FET-SEED's)

The authors have demonstrated a smart pixel prototype field-effect-transistor-self-electrooptic-effect-device (FET-SEED) integrated optoelectronic amplifier utilizing process technology suitable for flexible design and fabrication of high-yield optoelectronic circuits. A single MBE growth sequence provides for quantum-well modulators, photodiodes, doped channel MIS-like field-effect transistors (DMTs), and resistors. The device dimensions are controlled in a planar technology using ion implantation and selective plasma etching for isolation and contacting. Results demonstrate optical amplification in a fully integrated circuit. This technology will enable increased functionality by providing digital electronic processing between optical input and output