Ku-band subsampling track-and-hold amplifier with 8 ENOB resolution

A wideband subsampling track-and-hold amplifier has been designed for input frequencies up to Ku-band and clock rates up to 2.5 GS/s. Circuits were fabricated in 1 /spl mu/m InP SHBT technology. Spur-free dynamic range measured with two-tone input frequencies of 12.6 and 12.602 GHz and a 2.5 GS/s clock rate ranges from 53-69 dB at an input level of -1 dBFS for each tone. Signal-to-noise ratio (SNR) test results show that the master/slave (M/S) track-and-hold design provides 59 dB of SNR in a 1 GHz bandwidth at input frequencies up to at least 2.6 GHz. A single track-and-hold dissipates 1.5 W while the M/S configuration dissipates 2.5 W.     

A 3.2-GHz second-order delta-sigma modulator implemented in InP HBTtechnology

This paper presents a second-order delta-sigma (ΔΣ) modulator fabricated in a 70 GHz (f_T), 90 GHz (f_max) AlInAs-GaInAs heterojunction bipolar transistor (HBT) process on InP substrates. The modulator is a continuous time, fully differential circuit operated from ±5 volt supplies and dissipates 1 W. At a sample rate of 3.2 GHz and a signal bandwidth of 50 MHz (OSR=32100 MSPS Nyquist rate) the modulator demonstrates a Spur Free Dynamic Range (SFDR) of 71 dB (12-b dynamic range). The modulator achieves the ideal signal-to-noise ratio (SNR) of 55 dB for a second-order modulator at an oversampling ratio (OSR) of 32. The design of a digital decimation filter for this modulator is complete and the filter is currently in fabrication in the same technology. This work demonstrates the first ΔΣ modulator in III-V technology with ideal performance and provides the foundation for extending the use of ΔΣ modulator analog-to-digital converters (ADC's) to radio frequencies (RF)     

IF-sampling fourth-order bandpass /spl Delta//spl Sigma/ modulator for digital receiver applications

Bandpass modulators sampling at high IFs (/spl sim/200 MHz) allow direct sampling of an IF signal, reducing analog hardware, and make it easier to realize completely software-programmable receivers. This paper presents the circuit design of and test results from a continuous-time tunable IF-sampling fourth-order bandpass /spl Delta//spl Sigma/ modulator implemented in InP HBT IC technology for use in a multimode digital receiver application. The bandpass /spl Delta//spl Sigma/ modulator is fabricated in AlInAs-GaInAs heterojunction bipolar technology with a peak unity current gain cutoff frequency (f/sub T/) of 130 GHz and a maximum frequency of oscillation (f/sub MAX/) of 130 GHz. The fourth-order bandpass /spl Delta//spl Sigma/ modulator consists of two bandpass resonators that can be tuned to optimize both wide-band and narrow-band operation. The IF is tunable from 140 to 210 MHz in this /spl Delta//spl Sigma/ modulator for use in multiple platform applications. Operating from /spl plusmn/5-V power supplies, the fabricated fourth-order /spl Delta//spl Sigma/ modulator sampling at 4 GSPS demonstrates stable behavior and achieves a signal-to-(noise + distortion) ratio (SNDR) of 78 dB at 1 MHz BW and 50 dB at 60 MHz BW. The average SNDR performance measured on over 250 parts is 72.5 dB at 1 MHz BW and 47.7 dB at 60 MHz BW.