Finite common-mode rejection in fully differential operational amplifiers

A nonlinear mechanism which affects common-mode rejection (CMR) of fully differential integrated operational amplifiers (opamps) is highlighted and analysed by computer simulations. In particular, it is shown how the finite CMR of fully differential opamp circuits under practical operating conditions is mainly related to such a mechanism rather than to transistor mismatch.     

A new compact temperature-compensated CMOS current reference

This paper describes a new circuit integrated on silicon, which generates temperature-independent bias currents. Such a circuit is firstly employed to obtain a current reference with first-order temperature compensation, then it is modified to obtain second-order temperature compensation. The operation principle of the new circuits is described and the relationships between design and technology process parameters are derived. These circuits have been designed by a 0.35 /spl mu/m BiCMOS technology process and the thermal drift of the reference current has been evaluated by computer simulations. They show good thermal performance and in particular, the new second-order temperature-compensated current reference has a mean temperature drift of only 28 ppm//spl deg/C in the temperature range between -30/spl deg/C and 100/spl deg/C.     

The influence of thermic effect of food on satiety

OBJECTIVES: To evaluate energy expenditure after three isoenergetic meals of different nutrient composition and to establish the relationship between the thermic effect of food (TEF), subsequent energy intake from a test meal and satiety sensations related to consumption. DESIGN: The study employed a repeated measures design. Ten subjects received, in a randomized order, three meals of 2331+/-36 kJ (557+/-9 kcal). About 68% of energy from protein in the high protein meal (HP), 69% from carbohydrate in the high carbohydrate meal (HC) and 70% from fat in the high fat meal (HF). SETTING: The experiments were performed at the University of Milan. Subjects: Ten normal body-weight healthy women. METHODS: Energy expenditure was measured by indirect calorimetric measurements, using an open-circuit ventilated-hood system; intake was assessed 7h later by weighing the food consumed from a test meal and satiety sensations were rated by means of a satiety rating questionnaire. RESULTS: TEF was 261+/-59, 92+/-67 and 97+/-71 kJ over 7 h after the HP, HC and HF meals, respectively. The HP meal was the most thermogenic (P < 0.001) and it determined the highest sensation of fullness (P=0.002). There were no differences in the sensations and thermic effect between fat and carbohydrate meals. A significant relationship linked TEF to fullness sensation (r=0.41, P=0.025). Energy intake from the test meal was comparable after HP, HC and HF meals. CONCLUSIONS: Our results suggest that TEF contributes to the satiating power of foods.     

Design of a CMOS opamp input stage immune to EMI

In this paper the behaviour of a complementary nMOS–pMOS differential pair in the presence of RF interference superimposed on the input terminals is analysed. An intrinsic nonlinearity cancellation mechanism in this structure is demonstrated, and proper design criteria are presented to exploit this mechanism in order to achieve a very high immunity to RF interference. A high-immunity complementary differential pair has been employed as an input stage of a folded cascode operational amplifier and its improved behaviour in the presence of RF interference has been verified by computer simulations.     

Prediction of high-power EMI effects in CMOS operational amplifiers

In this paper, a new analytical model for the prediction of the effects of high-power electromagnetic interference in CMOS operational amplifiers is presented. This model provides a closed-form expression of the operational amplifiers (opamp) output offset voltage that is induced if radio frequency interference (RFI) is superimposed onto the opamp input voltages in terms of technology and design parameters. Such a model is very useful both to predict the susceptibility of a given opamp circuit and to design opamp topologies with a high immunity to RFI. Model predictions are compared with experimental results.     

RFI-induced distortion in switched-capacitor circuits

The errors which are induced by radio-frequency interference (RFI) in switched-capacitor (SC) circuits are discussed and the main role played by the distortion of MOS switches in the on-state is highlighted. Furthermore, a new simple analytical model, which enables one to predict RFI-induced errors in SC circuits is proposed and it is validated by the comparison of its predictions with time-domain computer simulation results.     

A Linear Voltage Regulator Model for EMC Analysis

In this paper, a simple model of a linear voltage regulator circuit, which is suitable to investigate the propagation of EMI through integrated circuit power distribution networks is proposed and it is validated by comparison of model predictions, computer simulations and experimental results. Moreover, application examples of the new model in EMC analysis are given with reference to both susceptibility and emission issues.     

Compact, very low voltage, temperature-independent reference circuit

A compact, very low voltage, temperature-independent reference circuit, which is based on the thermal properties of bipolar junction transistors in the saturation region is presented. The new circuit operates from a minimum power supply of less than 1V and provides a reference voltage with a nominal thermal drift of ~30 ppm/degC in the temperature range between -40 and 110degC. The proposed circuit has been integrated on silicon by a 0.35 mum CMOS technology and a reference voltage with a measured untrimmed thermal drift of ~100 ppm/degC has been reported. The new voltage reference occupies a silicon area of only 3,500 mum², shows a power consumption of <30 muW and its DC power supply rejection is better than 65 dB     

Investigation on RFI effects in bandgap voltage references

In this paper the susceptibility of integrated bandgap voltage references to Radio Frequency Interference (RFI) is investigated by on-chip measurements carried out on Kuijk and Tsividis bandgap circuits. These measurements highlight the offset in the reference voltage induced by continuous wave RFI and the complete failures which may be experienced by bandgap circuits. The role of the susceptibility of the startup circuit and of the operational amplifier which are included in such circuits is also focused.