A 150 MHz 0.6 μm BiCMOS superscalar microprocessor

An implementation of the Pentium microprocessor architecture in 0.6 μm BiCMOS technology is described. Power dissipation is reduced and performance is enhanced over the previous generation. Processor features, implementation technology, and circuit techniques are discussed. An internal clock rate of 150 MHz is achieved at 3.7 V and -55°C     

Low-voltage swing logic circuits for a Pentium/spl reg/ 4 processor integer core

The Pentium/spl reg/ 4 processor architecture uses a 2/spl times/ frequency core clock to implement low latency integer operations. Low-voltage-swing (LVS) logic circuits implemented in 90-nm technology meet the frequency demands of a third-generation integer-core design.