EURAMET Project to Examine Underlying Parameters in Radiance Temperature Scale Realization, 156\,^{\circ }\mathrm{C} to 1000\,^{\circ }\mathrm{C}

Over the medium temperature range (from \(156\,^{\circ }\mathrm{C}\) to \(1000\,^{\circ }\mathrm{C}\) ), radiation thermometry is usually established within a national metrology institute (NMI) by means of variable temperature blackbody radiation sources, whose temperature is determined using a platinum resistance thermometer or thermocouple, calibrated in terms of the International Temperature Scale of 1990 (ITS-90), positioned in close proximity to the back radiating surface of the blackbody. It is also reasonably common to establish a scale using a suitable radiation thermometer, such as an indium gallium arsenide (InGaAs) detector-based narrow band radiation thermometer, calibrated using a number of fixed-point blackbody sources from the indium (In) to silver (Ag) (or copper (Cu)) points, with the calibration results fitted using a parameterized Planckian interpolation function. During 2007 and 2008, two InGaAs-based radiation thermometers were circulated around seven NMIs within the European Association of National Metrology Institutes (EURAMET) region in order to undertake a comparison of parameters necessary for radiation thermometry over the medium temperature range. Measurements were made of the size-of-source effect and gain (range) ratios of the two thermometers along with an assessment of the effect of changes in the ambient temperature and humidity on the thermometer output. The thermometers were also calibrated using fixed-point and/or variable temperature blackbody sources at each institute. A brief overview of the results obtained by this project is presented in this paper.     

Characterization of UME-Made Co–C Eutectic Fixed-Point Blackbody Cells

Eutectic phase transitions are commonly considered for use as fixed points in future 20XX temperature scales. Despite their potential as possible interpolation points in a high-temperature radiation thermometry scale (1000 °C and above), more studies on the reproducibility of the plateau temperature values are required. Various ongoing research projects on the long-term stability and reproducibility of the eutectic fixed points will likely improve the uncertainties enough to allow for their use as reference (or secondary) temperature points. In this article, the long-term reproducibility results of Co–C eutectic plateau realizations performed in the UME Radiation Thermometry Laboratory over four years, along with studies of the dependence on furnace heating/cooling rate and the short-term (1 day) repeatability, are presented. These measurements were performed with a monochromatic radiation thermometer calibrated according to ITS-90.     

Comparative Study of Two InGaAs-Based Reference Radiation Thermometers

More than one decade ago, an InGaAs detector-based transfer standard infrared radiation thermometer working in the temperature range from \(150\,{^{\circ }}\hbox {C}\) to \(1100\,{^{\circ }}\hbox {C}\) was built at TUBITAK UME in the scope of collaboration with IMGC (INRIM since 2006). During this timescale, the radiation thermometer was used for the dissemination of the radiation temperature scale below the silver fixed-point temperature. Recently, a new radiation thermometer with the same design but with different spectral responsivity was constructed and employed in the laboratory. In this work, we present the comparative study of these thermometers. Furthermore, the paper describes the measurement results of the thermometer’s main characteristics such as the size-of-source effect, spectral responsivity, gain ratio, and linearity. Besides, both thermometers were calibrated at the freezing temperatures of indium, tin, zinc, aluminum, and copper reference fixed-point blackbodies. The main study is focused on the impact of the spectral responsivity of thermometers on the interpolation parameters of the Sakuma–Hattori equation. Furthermore, the calibration results and the uncertainty sources are discussed in this paper.     

Analysis and optimization of nanometer CMOS circuits for soft-error tolerance

Nanometer circuits are becoming increasingly susceptible to soft errors due to alpha-particle and atmospheric neutron strikes as device scaling reduces node capacitances and supply/threshold voltage scaling reduces noise margins. It is becoming crucial to add soft-error tolerance estimation and optimization to the design flow to handle the increasing susceptibility. The first part of this paper presents a tool for accurate soft-error tolerance analysis of nanometer circuits (ASERTA) that can be used to estimate the soft-error tolerance of nanometer combinational circuits. The tolerance estimates generated by the tool match SPICE-generated estimates closely while taking orders of magnitude less computation time. The second part of the paper presents a tool for soft-error tolerance optimization of nanometer circuits (SERTOPT), which uses the tolerance estimates generated by ASERTA. The number of errors propagated to the primary outputs (POs) is minimized by adding optimal amounts of capacitive loading to the POs of the logic circuit. Using a novel delay-assignment-variation-based optimization methodology, the sizes, supply voltages, and threshold voltages of internal gates (not primary outputs) are chosen to minimize the energy and delay overhead due to the added capacitive loads. Experiments on ISCAS'85 benchmarks show that 79.3% soft-error reduction can be obtained on the average with modest increase in circuit delay and energy. Comparison with other techniques shows that our approach has a significantly better energy-delay-reliability tradeoff compared with others.     

Collaboration Between UME and LNE-INM on Co–C Eutectic Fixed-Point Construction and Characterization

Metal-carbon eutectic fixed-point construction and characterization are subjects of ongoing investigation within the field of radiation thermometry. National metrology institutes are in constant search of stable eutectic points with minimal uncertainty for the purposes of either increasing the working temperature range of radiation thermometry or obtaining intermediate check points for both contact and non-contact thermometries. The Co–C eutectic point (~1,324°C) would be very effective in reducing certain calibration uncertainties at this temperature, once long-term stable and reproducible cells are constructed. For these purposes, one Co–C eutectic cell was fabricated at UME, in collaboration with LNE-INM, while a second Co–C cell was constructed for UME. At UME, the cell was filled (in the Vega-BB3500PG blackbody) using methods developed by LNE-INM. Eutectic plateaux, eutectic temperatures, and their uncertainties have been assessed using the UME Transfer Standard Pyrometer TSP-2, calibrated at UME, and an IKE LP3, calibrated at INM. The two Co–C eutectic cells (one constructed at INM and the other at UME) were compared at UME. The short-term stability and reproducibility of the cells have been assessed for various thermal conditions. A provisional uncertainty budget for the thermodynamic temperature of the Co–C cell as determined by LNE-INM has been established.     

Comparison of Blackbodies for Calibration of Infrared Ear Thermometers

The article presents the results of the EURAMET Project No. 927 ??Comparison of blackbodies for calibration of infrared ear thermometers (IRETs)??. The objective of the comparison was to determine the agreement of blackbodies used for the calibration of IRETs among European national laboratories. To verify the accuracy of an IRET, a suitable blackbody (BB) is needed. Such a blackbody related to the EN standard, designed for the calibration of ear thermometers and immersed in a stirred water bath, was provided for the comparison by the pilot laboratory. The pilot provided also the transfer IRET and organized the comparison.     

Level-shifter free design of low power dual supply voltage CMOS circuits using dual threshold voltages

Usage of dual supply voltages in a digital circuit is an effective way of reducing the dynamic power consumption due to the quadratic relation of supply voltage to dynamic power consumption. But the need for level shifters when a low voltage gate drives a high voltage gate has been a limiting factor preventing widespread usage of dual supply voltages in digital circuit design. The overhead of level shifters forces designers to increase the granularity of dual voltage assignment, reducing the maximum obtainable savings. We propose a method of incorporating voltage level conversion into regular CMOS gates by using a second threshold voltage. Proposed level shifter design makes it possible to apply dual supply voltages at gate level granularity with much less overhead compared to traditional level shifters. We modify the threshold voltage of the high voltage gates that are driven by low voltage gates in order to obtain the level shifting operation together with the logic operation. Using our method, we obtained an average of 20% energy savings for ISCAS'85 benchmark circuits designed using 180-nm technology and 17% when 70-nm technology is used.     

Performance-Optimized Design for Parametric Reliability

Process variations have a significant impact on behavior of integrated circuits (ICs) designed in deep sub-micron (DSM) technologies, and it has been estimated that in some cases up to a generation of performance can be lost due to process variations (Bowman et al., IEEE J Solid State Circuits 37:183–190, 2002), making it a significant problem for design and manufacture of DSM ICs. Adaptive design techniques are fast evolving as a potential solution to this problem. Such techniques facilitate reconfiguration of an IC to enable its operation across process corners, thus ensuring parametric reliability in such ICs, and also improving manufacturing yield. In this paper, adaptive design techniques with a focus on timing of ICs, i.e., performance-optimized adaptive design, are explored. The focus of such performance-optimized adaptive design techniques is to ensure that adaptation does not cause an IC to violate timing specifications, thus giving priority to performance, which remains one of the most important parameters of an IC.