Alternative Realizations of CMOS Current Feedback Amplifiers for Low Voltage Applications

Two variants of a new current feedback amplifier (CFA) are presented in this paper. These CFAs are realized in CMOS technology and both are capable of working at low voltages. It is shown that one circuit performs better than the other by virtue of an increased impedance at its Z terminal achieved through the use of additional transistors. Analysis of both variants of the current conveyor and buffer that form the current feedback amplifier gives an insight into the location of primary poles and zeros of the CFAs. Simulation results indicate an overall gain bandwidth product in excess of 59 MHz and 102 MHz for each circuit at a gain of –10 and with a 3.3 V supply. Experimental results from a chip fabricated in a 0.35 m CMOS technology agree closely with the simulation results.     

A 14-bit high-temperature /spl Sigma//spl Delta/ modulator in standard CMOS

Experimental verification is given for the use of /spl Sigma//spl Delta/ modulation for high-temperature applications (/spl ges/approximately 150/spl deg/C) in a standard CMOS process. Switched-capacitor circuits are used to implement a second-order single-stage and a third-order 2-1 MASH /spl Sigma//spl Delta/ modulator with single-bit quantization. The two modulators have an oversampling ratio of 256 with an input signal bandwidth of 500 Hz. The modulators were fabricated in a 1.5-/spl mu/m standard CMOS technology. A fully differential signal path and near minimum sized switches are used to mitigate the effect of large junction-to-substrate leakage current present at high temperatures. Experimental results show both modulators are capable of over 14 bits of resolution at 225/spl deg/C and over 13 bits of resolution at 255/spl deg/C. Results show that the single-stage modulator is more resistant to high-temperature circuit impairment than is the MASH cascaded structure.     

Comparative Analysis of Tunable Q-Enhancement Filter Cell Topologies in a 2.4 GHz LNA

The special LNA topologies resulting from loading a simple LNA with a set of Q-enhanced inductors are analyzed and compared. The Q of the on-chip spiral inductors that form the LNA load is enhanced by using a negative resistance realized with a cross-coupled differential pair degenerated and biased in various ways. The performance of the LNA is presented for the following types of Q-enhancement circuit: ideal negative resistor (ideal cell), tail-biased non-degenerated cross-coupled differential pair (classic cell), tail-biased resistively degenerated cross-coupled differential pair (resistive cell), tail-biased LC degenerated cross-coupled differential pair (B-cell), self-biased LC degenerated cross-coupled differential pair (BB-cell). The analysis focuses on the benefits of each cell related to s-parameter response, noise and linearity and the interdependency of Q vs. center frequency during tuning. Low voltage design challenges are addressed by presenting the advantages of the novel self-biased LC degenerated cross-coupled differential pair (BB-cell).     

A high temperature precision amplifier

A precision operational amplifier has been developed for instrumentation applications in which the circuitry must operate in ambient temperatures as high as 200°C. At 200°C the amplifier maintains an input offset voltage and current of less than 200 μV and 1 nA respectively, a gain bandwidth product of 2.2 MHz, and a slew rate of 5.4 V/μS. The amplifier is fabricated in a standard CMOS process and consumes 5.5 mW of power at a supply voltage of 5 V. A continuous time auto-zeroed amplifier topology is used to achieve the low offset voltage levels. At high temperatures the leakage currents of the sample and hold switches used to achieve auto-zeroing, degrading the offset correction voltages stored on the hold capacitors. This degradation is reduced by using large external hold capacitors and by minimizing the diffusion area of the switches through the use of a doughnut shaped layout. The effect of the voltage degradation is reduced by sensing the offset correction voltage with a low sensitivity differential auxiliary input stage. A new input switch topology is used to reduce the amplifier's input offset current at high temperatures