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1.
Tommaso Caloiero Paola Caloiero Francesco Frustaci 《Water and Environment Journal》2018,32(3):433-445
The spatiotemporal analysis of a region's precipitation climate regime could be particularly interesting for many fields of applied sciences, such as climatology, hydrology and water resources management. In this study, the precipitation trends at seasonal and annual scale, over a large area of the northern Hemisphere have been analysed based on a globally gridded precipitation data sets of monthly observations. In particular, among the several data sets available in literature, with spatial resolutions of 0.5° longitude/latitude, in this work the Global Precipitation Climatology Centre Full Data Reanalysis Version 6 data set has been used. The broad extension of the area under investigation allowed a better understanding of trend precipitation patterns over space. In fact, yearly results evidenced a marked negative rainfall tendency in the eastern Mediterranean (more than ?20 mm/10 years) and in North Africa (until ?16 mm/10 years), while a relatively large positive trend (more than 20 mm/10 years) in central and northern Europe has been observed. 相似文献
2.
Frustaci F. Corsonello P. Perri S. Cocorullo G. 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》2006,14(11):1238-1249
The techniques known in literature for the design of SRAM structures with low standby leakage typically exploit an additional operation mode, named the sleep mode or the standby mode. In this paper, existing low leakage SRAM structures are analyzed by several SPEC2000 benchmarks. As expected, the examined SRAM architectures have static power consumption lower than the conventional 6-T SRAM cell. However, the additional activities performed to enter and to exit the sleep mode also lead to higher dynamic energy. Our study demonstrates that, due to this, the overall energy consumption achieved by the known low-leakage techniques is greater than the conventional approach. In the second part of this paper, a novel low-leakage SRAM cell is presented. The proposed structure establishes when to enter and to exit the sleep mode, on the basis of the data stored in it, without introducing time and energy penalties with respect to the conventional 6-T cell. The new SRAM structure was realized using the UMC 0.18-mum, 1.8-V, and the ST 90-nm 1-V CMOS technologies. Tests performed with a set of SPEC2000 benchmarks have shown that the proposed approach is actually energy efficient 相似文献
3.
A Comandone L Leone C Oliva S Frustaci M Monteleone AM Colussi O Dal Canton P Bergnolo A Boglione C Bumma 《Canadian Metallurgical Quarterly》1998,10(5):385-393
We investigated whether an association exists between genetic variants of the human obesity (OB or leptin) gene and body mass index (BMI) or weight in subjects with Prader Willi syndrome (PWS) and in age- and gender-matched lean and obese subjects without PWS. The study included 51 subjects with PWS (mean age = 17.7 +/- 9.5 years, BMI = 29.7 +/- 8.3 kg/m2); 50 non-PWS obese subjects (mean age = 18.2 +/- 10.8 years, BMI = 33.3 +/- 9.5 kg/m2); and 53 non-PWS lean subjects (mean age = 17.8 +/- 9.5 years, BMI = 19.5 +/- 2.9 kg/m2). Allele sizes were determined via standard polymerase chain reaction of the D7S1875 locus, a dinucleotide repeat polymorphism close to the OB gene and classified as trichotomous (homozygous < 208 bp, heterozygous < 208/ > or = 208 bp, homozygous > or = 208 bp) or dichotomous (homozygous < 208 bp or not). Non-PWS males showed a marked decrease in weight with larger alleles while females did not (interaction effect, p < 0.05). Comparable effects were not observed among the PWS subjects. Associations between BMI and genotype were statistically significant (r = 0.22, one-tailed p < 0.05) and comparable to previous research among the non-PWS subjects < 18 years, but not the adults (r = 0.05, one-tailed p = 0.38). Correlations were not statistically significant among either the adult or non-adult PWS subjects. 相似文献
4.
Cardiomyopathy may be the only clinical manifestation in female carriers of Duchenne muscular dystrophy 总被引:1,自引:0,他引:1
M Mirabella S Servidei G Manfredi E Ricci A Frustaci E Bertini M Rana P Tonali 《Canadian Metallurgical Quarterly》1993,43(11):2342-2345
Cardiomyopathy was reported in a few Duchenne muscular dystrophy (DMD) carriers with clinical evidence of myopathy. We report two carriers with dilated cardiomyopathy, increased serum CK, and no symptoms of muscle weakness. In heart biopsies of both patients, dystrophin-the protein product of DMD locus--was absent in many fibers. Dilated cardiomyopathy may be the only manifestation of dystrophin gene mutation in carriers. 相似文献
5.
G. Cocorullo P. Corsonello F. Frustaci S. Perri 《International Journal of Circuit Theory and Applications》2016,44(3):602-615
A new methodology to realize efficient multiplexers using quantum‐dot cellular automata (QCA) is presented in this paper. The novel designs here demonstrated fully exploit the intrinsic logic capabilities of the basic building block in the QCA domain: the Majority Gate. An efficient logic formulation is derived for the 4:1 multiplexing function that can be recursively applied to the realization of multiplexers with any fan‐in, by adding in the worst‐case path only one level of Majority Gate for each input doubling. A 16:1 multiplexer designed by applying the proposed recursive approach requires less than 1600 cells and consumes only 12 clock phases to complete the operation. Copyright © 2015 John Wiley & Sons, Ltd. 相似文献
6.
Frustaci F. Lanuzza M. Zicari P. Perri S. Corsonello P. 《Circuits, Devices & Systems, IET》2009,3(6):303-312
Data-pre-charged dynamic logic, also known as data-driven dynamic logic (D3L), is very efficient when low-power constraints are mandatory. Differently from conventional dynamic domino logic, which exploits a clock signal, D3L uses a subset of the input data signals for pre-charging the dynamic node, thus avoiding the clock distribution network. Power consumption is significantly reduced, but the pre-charge propagation path delay affects the speed performances and limits the energy?delay product (EDP) improvements. This study presents a new dynamic logic named split-path D3L (SPD3L) that overcomes the speed limitations of D3L. When applied to a 16 X 16 bit Booth multiplier realised with STMicroelectronics 65 nm 1V CMOS technology, the proposed technique leads to an EDP 25 and 30% lower than standard dynamic domino logic and conventional D3L counterparts, respectively. 相似文献
7.
Fabio Frustaci Stefania Perri Marco Lanuzza Pasquale Corsonello 《International Journal of Circuit Theory and Applications》2012,40(3):237-246
A new fast low‐power single‐clock‐cycle binary comparator is presented. High speed is assured by using parallel‐prefix architecture, whereas low power is guaranteed by reducing the switching activities of the internal nodes. When implemented with the ST 90 nm 1 V CMOS technology, the proposed circuit exhibits a 4.5 GHz maximum running frequency and 0.77µW/ MHz energy dissipation. Copyright © 2010 John Wiley & Sons, Ltd. 相似文献
8.
Fabio Frustaci Marco Lanuzza Stefania Perri Pasquale Corsonello 《International Journal of Circuit Theory and Applications》2014,42(5):452-467
Wide fan‐in dynamic logic gates are difficult to design due to the large number of leaky evaluation paths connected to the dynamic node. Designers have to cope with their low noise tolerance further worsened by the effects of process parameter variation. In this paper, a novel analytical model is derived and validated to evaluate the noise robustness of wide fan‐in dynamic logic gates taking process variation effects into account. Experiments were performed using a commercial 45‐nm 1‐V CMOS technology, and the noise robustness in terms of unity noise gain (UNG) was evaluated for 16 and 32‐bit OR gates. Obtained results demonstrate that the proposed model is able to predict the mean value of the UNG with a maximum error of only 6.8%, whereas the difference between the predicted and simulated UNG yield is always lower than five percentage points. Copyright © 2012 John Wiley & Sons, Ltd. 相似文献
9.
A previously undescribed case of right ventricular aneurysm (RVA) associated with hypertrophic cardiomyopathy in an advanced stage is reported. The diagnosis was established by noninvasive (cardiac two-dimensional echocardiogram and nuclear MRI) and invasive (cardiac catheterization, angiography, and biventricular endomyocardial biopsy) cardiac examinations, which documented hypertrophied, dilated and hypokinetic biventricular chambers associated with typical histologic findings (histologic hypertrophic cardiomyopathy index of 66%). A prominent narrowing of myocardial arterioles, extended to the right ventricular myocardium, has been identified and has been hypothesized as being responsible for RVA formation. 相似文献
10.
Raffaele De Rose Marco Lanuzza Fabio Frustaci Sohan Purohit 《Circuits, Systems, and Signal Processing》2014,33(4):1019-1034
Addition represents an important operation that significantly impacts the performance of almost every data processing system. Due to their importance and popularity, addition algorithms and their corresponding circuit implementations have consistently received attention in research circles, over the years. One of the most popular implementations for long adders is the carry skip adder. In this paper, we present the design space exploration for a variety of carry skip adder implementations. More specifically, the paper focuses on the implementation of these adders using traditional as well as novel dynamic circuit design styles. 8–16–32–64-bit adders were implemented using traditional domino, footless domino, and data driven dynamic logic (D3L) in ST Microelectronics 45 nm 1 V CMOS process. In order to further exploit the advantages of the domino and D3L approaches, a new hybrid methodology combining both strategies was implemented and presented in this work. The adders were analyzed for energy-delay trade-offs at different process corners. They were also examined for their sensitivity to process and supply voltage variations. Comparative simulation results reveal that the full D3L adder ensures a better energy-delay product over all process corners (down to 34 % and 25 % lower than the domino and hybrid implementations, respectively, at the typical corner), while showing at the same time similar performance in terms of process and supply voltage variability as compared to the other considered carry skip adder configurations. 相似文献