Investigation of the Process of Plasma Through Etching of HkMG Stack of Nanotransistor with a 32-nm Critical Dimension

The processes of plasma etching of stack layers to form a structure of a metal gate of a nanoscale transistor with a dielectric with a high level of dielectric permittivity (HkMG) are investigated. A resist mask formed by fine-resolution electron-beam lithography is used in the etching. The plasma etching of the stack’s layers is carried out in one technological etching cycle without a vacuum break. The sequential anisotropic etching process of the stack of polysilicon, tantalum nitride, and hafnium nitride, as well as the etching process of the gate insulator based on hafnium oxide with a high degree of selectivity in relation to the underlying crystalline silicon, which guarantees the complete removal of the layer of hafnium oxide and the minimal loss of the silicon layer (not more than 0.5 nm), is investigated.     

Multilevel Bipolar Memristor Model Considering Deviations of Switching Parameters in the Verilog-A Language

Russian Microelectronics - We describe a bipolar memristor in the Verilog-A language. The proposed model concepts take into account the following parameter deviations in the memristor switching...     

SEM Linear Measurement in a Wide Magnification Range

A method of SEM linear measurement is proposed in which the reference marker displayed on the screen is used as a standard. The method works in a wide range of magnification without magnification calibration. Calibration of the marker against the MShPS-2.0K linear standard is described. The characteristics of the marker are investigated as functions of scanning range and declared effective marker length for the CamScan S-4 model of SEM. The maximum allowable calibration interval is determined for this SEM.     

Nonvolatile memory cells based on the effect of resistive switching in depth-graded ternary Hf x Al1 − x O y oxide films

A nonvolatile memory cell prototype based on the effect of resistive switching in thin Hf _x Al_{1 ? x} O _y oxide films grown by atomic layer deposition (ALD) with a Al depth-graded profile has been developed. This prototype imitates the arrangement of memory cells between the metallization layers of integral circuits. The obtained results are much superior to the parameters of conventional flash memory cells in increasing the reset speed and decreasing the reset voltage.     

Formation of field-emission emitters by microwave plasma-chemical synthesis of nanocarbon structures

A nanocarbon-emitter technology for integrated field-emission elements has been developed. The modes in which various carbon film structures of diamond, graphite, and graphene-like types are produced were determined. The low-temperature method of obtaining ultradispersed diamonds was examined. It is shown that the high-emission properties of nanodiamond-graphite emitters result from the self-organization of diamond nanocrystals in a graphite film in the course of deposition from ethanol vapor at low pressure with the use of a strongly nonequilibrium microwave plasma. The following parameters of integrated field-emission diodes were obtained: emission threshold of 2.5 V/μm and emission current density of 1.75 A/cm². The highest current density of more than 20 A/cm² was obtained in a study of blade-type emitters.     

Integration of functional elements of resistive nonvolative memory with 1T-1R topology

The issues related to the integration of functional elements of ReRAM memory based on resistive Pt/HfO₂/TiN structures with transistors fabricated by CMOS technology (0.18 μm node) are discussed when placing the memory cells in metallization layers. It is shown that the formation of a ReRAM stack can be organized as the “back end of line” (BEOL) process. The possibility is demonstrated of writing information in fabricated 1T-1R cells at the given levels of current determined by the voltage on the transistor, which allows one to choose the required values of resistance for the ON and OFF states. The presence of a transistor makes it possible to limit the power that is scattered in a resistance-switchable structure, and makes its parameters virtually insensitive to changes in the voltage of writing. The latter circumstance makes it possible to use the same recording voltage for all devices, which makes the problem of reproducing the values for different cells in an array less acute.     

Investigation of the properties and manufacturing features of nonvolatile FRAM memory based on atomic layer deposition

The structural and electrical properties of materials based on hafnium oxide grown by atomic layer deposition (ALD) are analyzed. The possibility and prospects of the use of their nanoscale films in nonvolatile memory are considered. The possibility of scaling Ferroelectric random access memory (FRAM) to subμm dimensions while preserving the ferroelectric properties is shown.     

Linear Standard for SEM–AFM Microelectronics Dimensional Metrology in the Range 0.01–100 μm

Linear standards for the calibration of SEMs and AFMs are reviewed. Requirements to a surface pattern designed to serve as a universal standard for the above purpose are defined. A trapezoidal pitch structure is proposed, in which the sidewalls of basic units essentially make a large angle with the normal to the surface. Its uses in SEM–AFM dimensional metrology are considered. A new, universal standard implementing the structure is described. Its certification is briefly reported. SEM and AFM experiments with the standard are presented.     

Modeling the Dynamics of the Integral Dielectric Permittivity of a Porous Low-K Organosilicate Film during the Dry Etching of a Photoresist in O2 Plasma

Russian Microelectronics - Using an imitational cellular-automaton model, the structural degradation of a interlayer low-K dielectric during the plasma etching etching of a photoresist is studied....     

Diffraction ellipsometric measurement of step height on wafer surfaces

A diffraction-ellipsometry method is described for determining step height on a homogeneous material or an arbitrary multilayer. It consists in measuring ellipsometric parameters for individual beams reflected from the respective sides of a step and for a combined beam obtained from the two reflected beams, with the step height calculated from the measured data by a specially designed algorithm. With multilayers, the ellipsometric parameters are also to be measured with the specimen immersed in a suitable liquid. Beam combining is performed by a special device, which is also designed to change the amplitude and phase of each beam by specific amounts. Care is taken to make the respective wave fronts of the reflected beams parallel on the photodetector.Translated from Mikroelektronika, Vol. 34, No. 2, 2005, pp. 119–128.Original Russian Text Copyright © 2005 by Gornev, Lonskii.